Invention Grant
- Patent Title: Method of tuning threshold voltages of transistors
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Application No.: US18068647Application Date: 2022-12-20
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Publication No.: US12087767B2Publication Date: 2024-09-10
- Inventor: Kuan-Chang Chiu , Chia-Ching Lee , Chien-Hao Chen , Hung-Chin Chung , Hsien-Ming Lee , Chi On Chui , Hsuan-Yu Tung , Chung-Chiang Wu
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- Main IPC: H01L27/088
- IPC: H01L27/088 ; H01L21/8234 ; H01L29/417 ; H01L29/423 ; H01L29/66 ; H01L29/78

Abstract:
A structure includes a semiconductor substrate including a first semiconductor region and a second semiconductor region, a first transistor in the first semiconductor region, and a second transistor in the second semiconductor region. The first transistor includes a first gate dielectric over the first semiconductor region, a first work function layer over and contacting the first gate dielectric, and a first conductive region over the first work function layer. The second transistor includes a second gate dielectric over the second semiconductor region, a second work function layer over and contacting the second gate dielectric, wherein the first work function layer and the second work function layer have different work functions, and a second conductive region over the second work function layer.
Public/Granted literature
- US20230122022A1 Method of Tuning Threshold Voltages of Transistors Public/Granted day:2023-04-20
Information query
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