Invention Grant
- Patent Title: Layout pattern for magnetoresistive random access memory
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Application No.: US18395649Application Date: 2023-12-25
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Publication No.: US12150315B2Publication Date: 2024-11-19
- Inventor: Ya-Huei Tsai , Rai-Min Huang , Yu-Ping Wang , Hung-Yueh Chen
- Applicant: UNITED MICROELECTRONICS CORP.
- Applicant Address: TW Hsin-Chu
- Assignee: UNITED MICROELECTRONICS CORP.
- Current Assignee: UNITED MICROELECTRONICS CORP.
- Current Assignee Address: TW Hsin-Chu
- Agent Winston Hsu
- Priority: TW109101457 20200116
- Main IPC: H10B61/00
- IPC: H10B61/00 ; G11C11/16 ; H01F10/32 ; H01L23/528 ; H10N50/80 ; H10N50/85

Abstract:
A layout pattern for magnetoresistive random access memory (MRAM) includes a substrate having a first active region, a second active region, and a word line connecting region between the first active region and the second active region, a first gate pattern extending along a first direction from the first active region to the second active region, a second gate pattern extending along the first direction from the first active region to the second active region, a first magnetic tunneling junction (MTJ) between the first gate pattern and the second pattern and within the word line connecting region, and a second MTJ between the first gate pattern and the second gate pattern in the first active region. Preferably, top surfaces of the first MTJ and the second MTJ are coplanar.
Public/Granted literature
- US20240130141A1 LAYOUT PATTERN FOR MAGNETORESISTIVE RANDOM ACCESS MEMORY Public/Granted day:2024-04-18
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