Invention Grant
- Patent Title: Network-on-chip architecture for handling different data sizes
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Application No.: US17663376Application Date: 2022-05-13
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Publication No.: US12244518B2Publication Date: 2025-03-04
- Inventor: Krishnan Srinivasan , Sagheer Ahmad , Ygal Arbel , Aman Gupta
- Applicant: Xilinx, Inc.
- Applicant Address: US CA San Jose
- Assignee: Xilinx, Inc.
- Current Assignee: Xilinx, Inc.
- Current Assignee Address: US CA San Jose
- Agent Kevin T. Cuenot
- Main IPC: H04L49/109
- IPC: H04L49/109

Abstract:
An integrated circuit (IC) includes a Network-on-Chip (NoC). The NoC includes a plurality of NoC master circuits, a plurality of NoC slave circuits, and a plurality of switches. The plurality of switches are interconnected and communicatively link the plurality of NoC master circuits with the plurality of NoC slave circuits. The plurality of switches are configured to receive data of different widths during operation and implement different operating modes for forwarding the data based on the different widths.
Public/Granted literature
- US20230370392A1 NETWORK-ON-CHIP ARCHITECTURE FOR HANDLING DIFFERENT DATA SIZES Public/Granted day:2023-11-16
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