Invention Grant
- Patent Title: SERDES circuit automatic gain control and convergence
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Application No.: US17484205Application Date: 2021-09-24
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Publication No.: US12261724B2Publication Date: 2025-03-25
- Inventor: Itamar Levin , Tali Warshavsky
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwegman Lundberg & Woessner, P.A.
- Main IPC: H04L25/03
- IPC: H04L25/03 ; G06F13/42 ; H03G3/30 ; H04B1/16

Abstract:
An Automatic Gain Control (AGC) SERDES circuit may be used to provide improved gain control for SERDES operation. This AGC SERDES circuit uses an initial gain convergence to determine and store an initial gain level. Once the initial gain convergence is complete, the AGC SERDES circuit uses a signal peak tracking to reduce or prevent saturation events. By setting the gain target based on tracked changes in the equalizer coefficients, the AGC SERDES circuit adapts the gain target to reduce or prevent saturation events and provide the improved communication throughput. A SERDES receiver circuit also provides improved performance using an improved convergence flow within its subcomponent blocks. The improved convergence flow also provides the ability to track environmental changes, voltage changes, and changes to input parameters, and can be performed while data is running on the link to provide continuously improved communication channel performance.
Public/Granted literature
- US20230100177A1 SERDES CIRCUIT AUTOMATIC GAIN CONTROL AND CONVERGENCE Public/Granted day:2023-03-30
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