Invention Application
- Patent Title: Process for fabricating a capacitor within an integrated circuit, and corresponding integrated circuit
- Patent Title (中): 用于在集成电路内制造电容器的工艺以及相应的集成电路
-
Application No.: US09932513Application Date: 2001-08-17
-
Publication No.: US20020022333A1Publication Date: 2002-02-21
- Inventor: Yves Morand , Jean-Luc Pelloie
- Applicant: STMicroelectronics S.A.
- Applicant Address: FR Montrouge
- Assignee: STMicroelectronics S.A.
- Current Assignee: STMicroelectronics S.A.
- Current Assignee Address: FR Montrouge
- Priority: FR0010727 20000818
- Main IPC: H01L021/20
- IPC: H01L021/20 ; H01L029/00

Abstract:
A production of a capacitor includes the simultaneous production, in at least part of an intertrack insulating layer (3) associated with a given metallization level, on the one hand, of the two electrodes (50, 70) and of the dielectric layer (60) of the capacitor and, on the other hand, of a conducting trench (41) which laterally extends the lower electrode of the capacitor, is electrically isolated from the upper electrode and has a transverse dimension smaller than the transverse dimension of the capacitor, and the production, in the interlevel insulating layer (8) covering the intertrack insulating layer, of two conducting pads (80, 81) which come into contact with the upper electrode of the capacitor and with the conducting trench, respectively.
Public/Granted literature
- US06734483B2 Process for fabricating a capacitor within an integrated circuit, and corresponding integrated circuit Public/Granted day:2004-05-11
Information query