公开(公告)号：US20020022333A1

公开(公告)日：2002-02-21

申请号：US09932513

申请日：2001-08-17

Applicant: STMicroelectronics S.A.

Inventor： Yves Morand ,  Jean-Luc Pelloie

IPC: H01L021/20 ,  H01L029/00

CPC classification number: H01L28/60 ,  H01L21/76895

Abstract: A production of a capacitor includes the simultaneous production, in at least part of an intertrack insulating layer (3) associated with a given metallization level, on the one hand, of the two electrodes (50, 70) and of the dielectric layer (60) of the capacitor and, on the other hand, of a conducting trench (41) which laterally extends the lower electrode of the capacitor, is electrically isolated from the upper electrode and has a transverse dimension smaller than the transverse dimension of the capacitor, and the production, in the interlevel insulating layer (8) covering the intertrack insulating layer, of two conducting pads (80, 81) which come into contact with the upper electrode of the capacitor and with the conducting trench, respectively.

Abstract translation: 电容器的生产包括在两个电极（50,70）和电介质层（60）中的至少一部分与给定的金属化水平相关联的交织绝缘层（3）的同时产生 ），另一方面，横向延伸电容器的下电极的导电沟槽（41）与上电极电隔离并且具有比电容器的横向尺寸小的横向尺寸，以及 在覆盖交织绝缘层的层间绝缘层（8）中分别与电容器的上电极和导电沟槽接触的两个导电焊盘（80,81）的制造。