Invention Application
- Patent Title: Wafer level hermetic sealing method
- Patent Title (中): 晶圆级气密密封方法
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Application No.: US09984734Application Date: 2001-10-31
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Publication No.: US20020113296A1Publication Date: 2002-08-22
- Inventor: Chang-ho Cho , Hyung-jae Shin , Woon-bae Kim
- Applicant: Samsung Electronics Co., Ltd.
- Applicant Address: KR Suwon-city
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Suwon-city
- Priority: KR2001-5256 20010203
- Main IPC: H01L021/44
- IPC: H01L021/44 ; H01L023/552

Abstract:
A device that is hermetically sealed at a wafer level or a method of hermetically sealing a device, which is sensitive to high temperatures or affected by heating cycles. Semiconductor devices are formed on a wafer. A lid wafer is formed. Adhesives are formed in a predetermined position over the wafer and/or the lid wafer. The wafer and the lid wafer are sealed by the adhesives at the wafer level. The sealing may be performed at a low temperature using a solder to protect the devices sensitive to heat. The sealed devices are diced into individual chips. In the wafer level hermetic sealing method, a sawing operation is performed after the devices are sealed. Therefore, the overall processing time is reduced, devices are protected from the effects of moisture or particles, and devices having a moving structure, such as MEMS devices, are more easily handled.
Public/Granted literature
- US06969639B2 Wafer level hermetic sealing method Public/Granted day:2005-11-29
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