发明申请
- 专利标题: Method for simultaneous degas and baking in copper damascene process
- 专利标题(中): 铜镶嵌工艺同时脱气和烘烤的方法
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申请号: US10655972申请日: 2003-09-04
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公开(公告)号: US20050054202A1公开(公告)日: 2005-03-10
- 发明人: Shing-Chyang Pan , Ching-Hua Hsieh , Jing-Cheng Lin , Hsien-Ming Lee , Cheng-Lin Huang , Shau-Lin Shue
- 申请人: Shing-Chyang Pan , Ching-Hua Hsieh , Jing-Cheng Lin , Hsien-Ming Lee , Cheng-Lin Huang , Shau-Lin Shue
- 专利权人: Taiwan Semiconductor Manufacturing Co., Ltd.
- 当前专利权人: Taiwan Semiconductor Manufacturing Co., Ltd.
- 主分类号: H01L21/285
- IPC分类号: H01L21/285 ; H01L21/3105 ; H01L21/311 ; H01L21/768
摘要:
A method for forming a copper damascene feature including providing a semiconductor process wafer including at least one via opening formed to extend through a thickness of at least one dielectric insulating layer and an overlying trench line opening encompassing the at least one via opening to form a dual damascene opening; etching through an etch stop layer at the at least one via opening bottom portion to expose an underlying copper area; carrying out a sub-atmospheric DEGAS process with simultaneous heating of the process wafer in a hydrogen containing ambient; carrying out an in-situ sputter-clean process; and, forming a barrier layer in-situ to line the dual damascene opening.
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