发明申请
- 专利标题: Semiconductor device
- 专利标题(中): 半导体器件
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申请号: US11197397申请日: 2005-08-05
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公开(公告)号: US20050275021A1公开(公告)日: 2005-12-15
- 发明人: Takuji Matsumoto , Takashi Ipposhi , Toshiaki Iwamatsu , Yuuichi Hirano
- 申请人: Takuji Matsumoto , Takashi Ipposhi , Toshiaki Iwamatsu , Yuuichi Hirano
- 申请人地址: JP Chiyoda-ku
- 专利权人: Renesas Technology Corp.
- 当前专利权人: Renesas Technology Corp.
- 当前专利权人地址: JP Chiyoda-ku
- 优先权: JP2003-006641 20030115; JP2003-295234 20030819
- 主分类号: H01L21/762
- IPC分类号: H01L21/762 ; H01L21/336 ; H01L21/76 ; H01L21/8234 ; H01L21/8238 ; H01L21/84 ; H01L27/01 ; H01L27/08 ; H01L27/088 ; H01L27/092 ; H01L27/12 ; H01L29/78 ; H01L29/786
摘要:
A semiconductor device and its manufacturing method are provided which can properly avoid reduction of isolation breakdown voltage without involving adverse effects like an increase in junction capacitance. Impurity-introduced regions (11) are formed after a silicon layer (3) has been thinned through formation of recesses (14). Therefore n-type impurities are not implanted into the portions of the p-type silicon layer (3) that are located between the bottoms of element isolation insulating films (5) and the top surface of a BOX layer (2), which avoids reduction of isolation breakdown voltage. Furthermore, since the impurity-introduced regions (11) are formed to reach the upper surface of the BOX layer (2), the junction capacitance of source/drain regions (12) is not increased.
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