发明申请
- 专利标题: Method for fabricating semiconductor device
- 专利标题(中): 制造半导体器件的方法
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申请号: US11519907申请日: 2006-09-13
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公开(公告)号: US20070004163A1公开(公告)日: 2007-01-04
- 发明人: Shinichi Fukada , Naotaka Hashimoto , Masanori Kojima , Hiroshi Momiji , Hiromi Abe , Masayuki Suzuki
- 申请人: Shinichi Fukada , Naotaka Hashimoto , Masanori Kojima , Hiroshi Momiji , Hiromi Abe , Masayuki Suzuki
- 主分类号: H01L21/331
- IPC分类号: H01L21/331
摘要:
An implantation step of a dopant ion for forming source and drain regions (S and D) is divided into one implantation of a dopant ion for forming a p/n junction with a well region (3), and one implantation of a dopant ion that does not influence a position of the p/n junction between the source and drain regions (S and D) and the well region with a shallow implantation depth and a large implantation amount. After conducting an activation heat treatment of the dopant, a surface of the source/drain region is made into cobalt silicide 12, so that the source/drain region (S and D) can have a low resistance, and a p/n junction leakage can be reduced.
公开/授权文献
- US07314805B2 Method for fabricating semiconductor device 公开/授权日:2008-01-01
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