发明申请
- 专利标题： STRUCTURE OF DIELECTRIC LAYERS IN BUILT-UP LAYERS OF WAFER LEVEL PACKAGE
- 专利标题（中）： 介质层结构在水平层包装层的建立层
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申请号： US11613247申请日： 2006-12-20
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公开(公告)号： US20080150130A1公开(公告)日： 2008-06-26
- 发明人: Wen-Kun Yang , Chun-Hui Yu , Chao-Nan Chou , Chih-Wei Lin , Ching-Shun Huang
- 申请人： Wen-Kun Yang , Chun-Hui Yu , Chao-Nan Chou , Chih-Wei Lin , Ching-Shun Huang
- 专利权人： Advanced Chip Engineering Technology Inc.
- 当前专利权人： Advanced Chip Engineering Technology Inc.
- 主分类号： H01L23/48
- IPC分类号： H01L23/48
摘要：
The present invention provides a structure of elastic dielectric layers with certain through holes adjacent to the angle of a RDL of WLP to absorb the stress. The elastic dielectric layer is made from silicone based materials with specific range of CTE, elongation rate and hardness, which can improve the mechanical reliability of the structure during temperature cycling test. The CTE difference between the RDL and the elastic dielectric material still may cause the elastic dielectric layer crack; to solve this problem, The present invention further provides a structure of dielectric layers with certain open through holes adjacent to the curve portion of a RDL of WLP which can reduce the stress accumulated at area of the dielectric layer adjacent to the RDL/dielectric layer interface to solve the crack problem of the dielectric layer.
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