发明申请
US20080268628A1 N-TYPE SEMICONDUCTOR COMPONENT WITH IMPROVED DOPANT IMPLANTATION PROFILE AND METHOD OF FORMING SAME
审中-公开
具有改进的嫁接轮廓的N型半导体元件及其形成方法
- 专利标题: N-TYPE SEMICONDUCTOR COMPONENT WITH IMPROVED DOPANT IMPLANTATION PROFILE AND METHOD OF FORMING SAME
- 专利标题(中): 具有改进的嫁接轮廓的N型半导体元件及其形成方法
-
申请号: US11739965申请日: 2007-04-25
-
公开(公告)号: US20080268628A1公开(公告)日: 2008-10-30
- 发明人: Puneet Kohli , Manoj Mehrotra , Antonio Luis Pacheco Rotondaro , Stan Ashburn , Nandakumar Mahalingam , Amitabh Jain
- 申请人: Puneet Kohli , Manoj Mehrotra , Antonio Luis Pacheco Rotondaro , Stan Ashburn , Nandakumar Mahalingam , Amitabh Jain
- 主分类号: H01L21/425
- IPC分类号: H01L21/425 ; H01L29/00 ; H01L21/22
摘要:
The disclosure relates to a method of forming an n-type doped active area on a semiconductor substrate that presents an improved placement profile. The method comprises the placement of arsenic in the presence of a carbon-containing arsenic diffusion suppressant in order to reduce the diffusion of the arsenic out of the target area during heat-induced annealing. The method may additionally include the placement of an amorphizer, such as germanium, in the target area in order to reduce channeling of the arsenic ions through the crystalline lattice. The method may also include the use of arsenic in addition to another n-type dopant, e.g. phosphorus, in order to offset some of the disadvantages of a pure arsenic dopant. The disclosure also relates to a semiconductor component, e.g. an NMOS transistor, formed in accordance with the described methods.
信息查询
IPC分类: