发明申请
US20090193274A1 System And Method of Coherent Data Transfer During Processor Idle States
审中-公开
处理器空闲状态期间相干数据传输的系统和方法
- 专利标题： System And Method of Coherent Data Transfer During Processor Idle States
- 专利标题（中）： 处理器空闲状态期间相干数据传输的系统和方法
-
申请号： US12419090申请日： 2009-04-06
-
公开(公告)号： US20090193274A1公开(公告)日： 2009-07-30
- 发明人: Leslie E. Cline , Siripong Sritanyaratana , Alon Naveh , Shai Rotem , Eric C. Samson , Michael N. Derr
- 申请人： Leslie E. Cline , Siripong Sritanyaratana , Alon Naveh , Shai Rotem , Eric C. Samson , Michael N. Derr
- 申请人地址： US CA Santa Clara
- 专利权人： Intel Corporation
- 当前专利权人： Intel Corporation
- 当前专利权人地址： US CA Santa Clara
- 主分类号： G06F1/32
- IPC分类号： G06F1/32 ; G06F12/00 ; G06F13/00
摘要：
Systems and methods of managing power provide for placing a processor in a non-snoopable state, where the processor is associated with a system memory. One or more data transfers between a controller and the system memory can be serviced while the processor is in the non-snoopable state. In one embodiment, it is determined that the processor has flushed an internal cache of the processor to the system memory before placing the processor in the non-snoopable state.
信息查询
