发明申请
- 专利标题: METHOD AND SYSTEM FOR POST-ROUTING LITHOGRAPHY-HOTSPOT CORRECTION OF A LAYOUT
- 专利标题(中): 用于布线布局的方法和系统
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申请号: US12129617申请日: 2008-05-29
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公开(公告)号: US20090300561A1公开(公告)日: 2009-12-03
- 发明人: Yang-Shan Tong , Daniel Zhang , Linni Wei , Alex Miloslavsky , Wei-Chih Tseng , Zongwu Tang
- 申请人: Yang-Shan Tong , Daniel Zhang , Linni Wei , Alex Miloslavsky , Wei-Chih Tseng , Zongwu Tang
- 申请人地址: US CA Mountain View
- 专利权人: SYNOPSYS, INC.
- 当前专利权人: SYNOPSYS, INC.
- 当前专利权人地址: US CA Mountain View
- 主分类号: G06F17/50
- IPC分类号: G06F17/50
摘要:
One embodiment of the present invention provides a system that verifies an integrated circuit (IC) chip layout. During operation, the system receives a layout of an IC chip after the layout has gone through a place-and-route operation. Next, the system performs a lithography compliance checking (LCC) operation on the layout to detect lithography hotspots within the layout, wherein each lithography hotspot is associated with a local routing pattern around the lithography hotspot. Next, for each detected lithography hotspot, the system compares the associated local routing pattern against a hotspot database to determine if the local routing pattern matches an entry in the hotspot database, which stores a set of known hotspot configurations. If so, the system corrects the lithography hotspot using correction guidance information associated with the hotspot configuration stored in the hotspot database. Otherwise, the system corrects the lithography hotspot by performing a local rip-up and reroute on the local routing pattern, iteratively, until achieving convergence or given number of iterations.
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