A frequency-locked loop circuit includes: a digital control oscillator that generates a clock; and an FLL controller that generates a frequency control code to control an oscillation frequency of the clock. The FLL controller includes: a frequency comparison unit that compares a frequency of a clock generated by the digital control oscillator with a frequency of a multiplied reference clock; and a delay code control unit that generates, based on a comparison result of the frequency comparison unit, the frequency control code so that the frequency of the clock generated by the digital control oscillator matches the frequency of the multiplied reference clock. The frequency comparison unit determines the frequency of the clock by using first and second thresholds. The delay code control unit generates the frequency control code according to a determination of the frequency comparison unit and outputs the frequency control code to the digital control oscillator.