Invention Application
- Patent Title: METHOD OF FABRICATING AN ELECTRICAL DEVICE PACKAGE STRUCTURE
- Patent Title (中): 制造电气设备包装结构的方法
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Application No.: US14855404Application Date: 2015-09-16
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Publication No.: US20160007472A1Publication Date: 2016-01-07
- Inventor: Tzyy-Jang Tseng , Shu-Sheng Chiang , Tsung-Yuan Chen , Shih-Lian Cheng
- Applicant: Unimicron Technology Corp.
- Main IPC: H05K3/00
- IPC: H05K3/00 ; H05K3/42 ; H05K3/06 ; H05K3/30

Abstract:
A method of packaging an electrical device including following steps is provided. A circuit board including a substrate and a first conductive pattern is provided. The electrical device having an electrode is disposed on the circuit board. A dielectric layer is formed on the circuit board to cover the electrical device, the electrode and the first conductive pattern, wherein a first caving pattern is foamed in the dielectric layer by the first conductive pattern. The dielectric layer is patterned to form a through hole and a second caving pattern connecting with the through hole and exposing the electrode. A conductive material is filled in the through hole and the second caving pattern to form a conductive via in the through hole and a second conductive pattern in the second caving pattern. The substrate is removed.
Public/Granted literature
- US10271433B2 Method of fabricating an electrical device package structure Public/Granted day:2019-04-23
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