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    CHIP PACKAGING STRUCTURE AND MANUFACTURING METHOD THEREOF
    3.
    发明公开
    CHIP PACKAGING STRUCTURE AND MANUFACTURING METHOD THEREOF 审中-公开

    公开(公告)号：US20230163074A1

    公开(公告)日：2023-05-25

    申请号：US17569509

    申请日：2022-01-06

    Applicant: Unimicron Technology Corp.

    Inventor： Tzyy-Jang Tseng ,  John Hon-Shing Lau ,  Pu-Ju Lin ,  Cheng-Ta Ko

    IPC: H01L23/532 ,  H01L23/495 ,  H01L23/538

    CPC classification number: H01L23/5329 ,  H01L23/53238 ,  H01L23/49503 ,  H01L23/5389

    Abstract: A chip packaging structure and a manufacturing method thereof are provided. The chip packaging structure includes a substrate, at least one first chip, an adhesive material, a redistribution circuit structure, and multiple second chips. The substrate has a first surface, a second surface opposite to the first surface, and at least one cavity. The at least one first chip is disposed in the at least one cavity. The adhesive material is disposed in the at least one cavity and located between the substrate and the at least one first chip. The redistribution circuit structure is disposed on the first surface of the substrate, and is electrically connected to the at least one first chip. The second chips are disposed on the redistribution circuit structure, and are electrically connected to the redistribution circuit structure.

    Inspection apparatus for bare circuit board
    4.
    发明授权
    Inspection apparatus for bare circuit board 有权

    公开(公告)号：US11579178B1

    公开(公告)日：2023-02-14

    申请号：US17647012

    申请日：2022-01-04

    Applicant: Unimicron Technology Corp.

    Inventor： Hsin-Hung Lee ,  Chun-Hsien Chien ,  Yu-Chung Hsieh ,  Yi-Hsiu Fang ,  Tzyy-Jang Tseng

    IPC: G01R29/08

    Abstract: An inspection apparatus used for inspecting a bare circuit board is provided, where the bare circuit board includes an antenna. The inspection apparatus includes a holding stage, a probing device, and a measurement device. The holding stage can hold the bare circuit board. The measurement device is electrically connected to the probing device and electrically connected to the antenna via the probing device. The measurement device can input a first testing signal to the antenna. The antenna can input a second testing signal to the measurement device after receiving the first testing signal. The measurement device can measure the antenna according to the second testing signal, where the first testing signal and the second testing signal both pass through no active component.

    PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF
    5.
    发明申请
    PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF 有权

    公开(公告)号：US20220344248A1

    公开(公告)日：2022-10-27

    申请号：US17235944

    申请日：2021-04-21

    Applicant: Unimicron Technology Corp.

    Inventor： John Hon-Shing Lau ,  Cheng-Ta Ko ,  Pu-Ju Lin ,  Kai-Ming Yang ,  Chi-Hai Kuo ,  Chia-Yu Peng ,  Tzyy-Jang Tseng

    IPC: H01L23/498 ,  H01L25/065 ,  H01L23/538 ,  H01L23/00 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56

    Abstract: A package structure includes a redistribution layer, a chip assembly, a plurality of solder balls, and a molding compound. The redistribution layer includes redistribution circuits, photoimageable dielectric layers, conductive through holes, and chip pads. One of the photoimageable dielectric layers located on opposite two outermost sides has an upper surface and openings. The chip pads are located on the upper surface and are electrically connected to the redistribution circuits through the conductive through holes. The openings expose portions of the redistribution circuits to define solder ball pads. Line widths and line spacings of the redistribution circuits decrease in a direction from the solder ball pads towards the chip pads. The chip assembly is disposed on the chip pads and includes at least two chips with different sizes. The solder balls are disposed on the solder ball pads, and the molding compound at least covers the chip assembly.

    Package structure and manufacturing method thereof
    6.
    发明授权
    Package structure and manufacturing method thereof 有权

    公开(公告)号：US11410933B2

    公开(公告)日：2022-08-09

    申请号：US17314055

    申请日：2021-05-07

    Applicant: Unimicron Technology Corp.

    Inventor： John Hon-Shing Lau ,  Cheng-Ta Ko ,  Pu-Ju Lin ,  Tzyy-Jang Tseng ,  Ra-Min Tain ,  Kai-Ming Yang

    IPC: H01L21/00 ,  H01L23/538 ,  H01L25/065 ,  H01L23/00 ,  H01L21/48 ,  H01L25/00

    Abstract: A package structure, including a bridge, an interposer, a first redistribution structure layer, a second redistribution structure layer, and multiple chips, is provided. The bridge includes a silicon substrate, a redistribution layer, and multiple bridge pads. The interposer includes an intermediate layer, multiple conductive vias, multiple first pads, and multiple second pads. The bridge is embedded in the intermediate layer. The bridge pads are aligned with the upper surface. The first redistribution structure layer is disposed on the upper surface of the interposer and is electrically connected to the first pads and the bridge pads. The second redistribution structure layer is disposed on the lower surface of the interposer and is electrically connected to the second pads. The chips are disposed on the first redistribution structure layer and are electrically connected to the first redistribution structure layer. The chips are electrically connected to each other through the bridge.

    CIRCUIT SUBSTRATE STRUCTURE AND MANUFACTURING METHOD THEREOF
    7.
    发明申请
    CIRCUIT SUBSTRATE STRUCTURE AND MANUFACTURING METHOD THEREOF 有权

    公开(公告)号：US20220130781A1

    公开(公告)日：2022-04-28

    申请号：US17567883

    申请日：2022-01-04

    Applicant: Unimicron Technology Corp.

    Inventor： Tzyy-Jang Tseng ,  Pu-Ju Lin ,  Cheng-Ta Ko ,  John Hon-Shing Lau

    IPC: H01L23/00 ,  H01L23/538 ,  H01L25/00 ,  H01L21/48

    Abstract: A circuit substrate structure includes a circuit substrate, at least two chips, and a bridge element. The circuit substrate has a first surface and a second surface opposite to each other. The chips are arranged in parallel on the first surface of the circuit substrate and electrically connected to the circuit substrate. The chips have active surfaces, back surfaces opposite to the active surfaces, and side surfaces connecting the active surfaces and the back surfaces. The chips include side circuits. The side circuits are arranged on the side surfaces and have first ends and second ends, the first ends extend to the active surfaces along the side surfaces, and the second ends extend to the back surfaces along the side surfaces. The bridge element is arranged on the back surfaces of the chips and electrically connected to the active surfaces of the chips through the side circuits.

    LIGHT EMITTING DIODE PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF
    9.
    发明申请
    LIGHT EMITTING DIODE PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF 有权

    公开(公告)号：US20210327861A1

    公开(公告)日：2021-10-21

    申请号：US16907183

    申请日：2020-06-20

    Applicant: Unimicron Technology Corp.

    Inventor： Ming-Ru Chen ,  Tzyy-Jang Tseng ,  Cheng-Chung Lo

    IPC: H01L25/16 ,  H01L33/62

    Abstract: A manufacturing method of a light emitting diode (LED) package structure includes the following steps. A carrier is provided. A redistribution layer is formed on the carrier. A plurality of active devices are formed on the carrier. A plurality of LEDs are transferred on the redistribution layer. The LEDs and the active devices are respectively electrically connected to the redistribution layer. The active devices are adapted to drive the LEDs, respectively. A molding compound is formed on the redistribution layer to encapsulate the LEDs. The carrier is removed to expose a bottom surface of the redistribution layer.

    Method of manufacturing circuit board structure
    10.
    发明授权
    Method of manufacturing circuit board structure 有权

    公开(公告)号：US11114782B2

    公开(公告)日：2021-09-07

    申请号：US16540038

    申请日：2019-08-13

    Applicant: Unimicron Technology Corp.

    Inventor： Tzyy-Jang Tseng ,  Pei-Wei Wang ,  Ching-Ho Hsieh ,  Shao-Chien Lee ,  Kuo-Wei Li

    IPC: H05K1/02 ,  H01R12/62 ,  H05K1/14 ,  H05K1/11 ,  H05K1/03 ,  H05K3/00 ,  H05K3/40 ,  H05K3/46

    Abstract: A circuit board structure has a first flexible circuit board, a second flexible circuit board, and a rigid board structure. The first flexible circuit board has a first dielectric layer and a first conductive circuit. The second flexible circuit board has a second dielectric layer and a second conductive circuit. The rigid board structure connects the first flexible circuit board and the second flexible circuit board. The rigid board structure has a third dielectric layer and a third conductive circuit. A dielectric loss value of the third dielectric layer is less than that of each of the first dielectric layer and the second dielectric layer. The third conductive circuit is electrically connected to the first and second conductive circuits.

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