Invention Application
US20160064382A1 SELECTIVE FuSi GATE FORMATION IN GATE FIRST CMOS TECHNOLOGIES
有权
门第一CMOS技术中的选择性富硅栅格形成
- Patent Title: SELECTIVE FuSi GATE FORMATION IN GATE FIRST CMOS TECHNOLOGIES
- Patent Title (中): 门第一CMOS技术中的选择性富硅栅格形成
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Application No.: US14475720Application Date: 2014-09-03
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Publication No.: US20160064382A1Publication Date: 2016-03-03
- Inventor: Peter Javorka , Stefan Flachowsky , Gerd Zschätzsch
- Applicant: GLOBALFOUNDRIES Inc.
- Main IPC: H01L27/092
- IPC: H01L27/092 ; H01L29/49 ; H01L21/311 ; H01L21/8238 ; H01L21/02 ; H01L21/308 ; H01L29/78 ; H01L29/66

Abstract:
The present disclosure provides a method of forming a semiconductor device structure with selectively fabricating semiconductor device structures having fully silicided (FuSi) gates and partially silicided gates. In aspects of the present disclosure, a semiconductor device structure with a first semiconductor device and a second semiconductor device is provided, wherein each of the first and second semiconductor devices includes a gate structure over an active region, each of the gate structures having a gate electrode material and a gate dielectric material. The gate electrode material of the first semiconductor device is recessed, resulting in a recessed first gate electrode material which is fully silicided during a subsequent silicidation process. On the gate electrode material of the second semiconductor device, a silicide portion is formed during the silicidation process.
Public/Granted literature
- US09349734B2 Selective FuSi gate formation in gate first CMOS technologies Public/Granted day:2016-05-24
Information query
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