Invention Application
US20160111501A1 METHOD TO DEFINE THE ACTIVE REGION OF A TRANSISTOR EMPLOYING A GROUP III-V SEMICONDUCTOR MATERIAL
有权
定义采用III-V族半导体材料的晶体管的活性区域的方法
- Patent Title: METHOD TO DEFINE THE ACTIVE REGION OF A TRANSISTOR EMPLOYING A GROUP III-V SEMICONDUCTOR MATERIAL
- Patent Title (中): 定义采用III-V族半导体材料的晶体管的活性区域的方法
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Application No.: US14516696Application Date: 2014-10-17
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Publication No.: US20160111501A1Publication Date: 2016-04-21
- Inventor: Po-Chih Chen , Jiun-Lei Jerry Yu , Yu-Syuan Lin , Yao-Chung Chang , King-Yuen Wong
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Main IPC: H01L29/205
- IPC: H01L29/205 ; H01L29/423 ; H03K17/687 ; H01L23/31 ; H01L29/66 ; H01L29/778 ; H01L29/417 ; H01L29/06
Abstract:
A group III-V transistor device employing a novel layout for isolating and/or defining the active region is provided. A group III-V heterojunction is arranged over or within a substrate, and an inner drain electrode is arranged over the group III-V heterojunction. A gate has a ring shape and is arranged over the group III-V heterojunction around the inner drain electrode. An outer source electrode has a ring-shaped region arranged over the group III-V heterojunction around the gate. A method for manufacturing the group III-V transistor device is also provided.
Public/Granted literature
- US09397168B2 Method to define the active region of a transistor employing a group III-V semiconductor material Public/Granted day:2016-07-19
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