发明申请
- 专利标题: SEMICONDUCTOR STRUCTURE WITH CONCAVE BLOCKING DIELECTRIC SIDEWALL AND METHOD OF MAKING THEREOF BY ISOTROPICALLY ETCHING THE BLOCKING DIELECTRIC LAYER
- 专利标题(中): 具有嵌入式电介质面板的半导体结构及其通过等离子体蚀刻阻塞介质层制造的方法
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申请号: US14600226申请日: 2015-01-20
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公开(公告)号: US20160211272A1公开(公告)日: 2016-07-21
- 发明人: Sateesh Koka , Senaka Kanakamedala , Raghuveer S. Makala , Rahul Sharangpani , Yanli Zhang , Yao-Sheng Lee , George Matamis
- 申请人: SANDISK TECHNOLOGIES INC.
- 主分类号: H01L27/115
- IPC分类号: H01L27/115 ; H01L29/66 ; H01L21/311 ; H01L21/28 ; H01L29/788
摘要:
A first blocking dielectric layer is formed in a memory opening through a stack of an alternating plurality of material layers and insulator layers. A spacer with a bottom opening is formed over the first blocking dielectric layer by deposition of a conformal material layer and an anisotropic etch. A horizontal portion of the first blocking dielectric layer at a bottom of the memory opening can be etched by an isotropic etch process that minimizes overetch into the substrate. An optional additional blocking dielectric layer, at least one charge storage element, a tunneling dielectric, and a semiconductor channel can be sequentially formed in the memory opening to provide a three-dimensional memory stack.
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