Invention Application
US20160315040A1 CORE FOR REVERSE REFLOW, SEMICONDUCTOR PACKAGE, AND METHOD OF FABRICATING SEMICONDUCTOR PACKAGE
审中-公开
反射反射芯片,半导体封装和制造半导体封装的方法
- Patent Title: CORE FOR REVERSE REFLOW, SEMICONDUCTOR PACKAGE, AND METHOD OF FABRICATING SEMICONDUCTOR PACKAGE
- Patent Title (中): 反射反射芯片,半导体封装和制造半导体封装的方法
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Application No.: US15134848Application Date: 2016-04-21
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Publication No.: US20160315040A1Publication Date: 2016-10-27
- Inventor: Jae Yeol SON , Jeong Tak MOON , Jae Hun SONG , Young Woo LEE , Eung Jae KIM , Su-Yong RYU , Hui Joong KIM , Ho Gun CHA , Ik Joo MAENG , Chan Goo YOO
- Applicant: MK Electron Co., Ltd.
- Assignee: MK Electron Co., Ltd.
- Current Assignee: MK Electron Co., Ltd.
- Priority: KR1020150057542 20150423; KR1020150135584 20150924
- Main IPC: H01L23/498
- IPC: H01L23/498 ; H01L23/00 ; H01L21/48

Abstract:
Provided are a reverse-reflow core, a semiconductor package, and a method of fabricating a semiconductor package. The semiconductor package includes: a semiconductor apparatus including a bump pad; and a bump portion bonded to the bump pad. The bump portion includes: a core; an intermetallic compound layer formed on the core; and a solder layer coating the intermetallic compound layer, wherein the thickness of a portion of the solder layer decreases as the distance between the portion of the solder layer and the bump pad increases. The reverse-reflow core, the semiconductor package, and the method of fabricating a semiconductor package enable the fabrication of a semiconductor package having high bonding strength and a high degree of precision.
Information query
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