An array substrate and a display device are disclosed. The array substrate includes a peripheral area in which a plurality of gate electrode material lines, a plurality of source-drain electrode material lines and a plurality of first metal lines are disposed. Overlapping areas are provided between or among the gate electrode material lines, the source-drain material lines and the first metal lines; a number of the overlapping areas of the source-drain material lines and the first metal lines is less than a number of the overlapping areas of the source-drain material lines and the gate electrode material lines; the gate electrode material lines, the source-drain material lines and the first metal lines are configured as connecting lines of circuits in the peripheral area.