公开(公告)号：US20250113541A1

公开(公告)日：2025-04-03

申请号：US18291389

申请日：2022-08-24

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Lizhong WANG ,  Guangcai YUAN ,  Ce NING ,  Hehe HU ,  Nianqi YAO ,  Dapeng XUE ,  Shuilang DONG ,  Liping LEI ,  Dongfang WANG ,  Zhengliang LI

IPC: H10D30/67 ,  H10D30/01

Abstract: An oxide thin film transistor, a preparation method thereof, and an electronic device are provided. The oxide thin film transistor includes a base substrate, a gate electrode and a metal oxide semiconductor layer, a gate insulation layer arranged between the metal oxide semiconductor layer and the gate electrode; the gate insulation layer includes a silicon oxide insulation layer and a silicon nitride layer, the silicon nitride layer adopts a single-layer structure or include a plurality of silicon nitride sublayers which are sequentially stacked, the silicon oxide insulation layer is between the silicon nitride layer and the metal oxide semiconductor layer; at least a part of a region in the silicon nitride layer satisfies that the percentage content of Si—H bonds in the sum of Si—N bonds, N—H bonds and Si—H bonds is not more than 7.

公开(公告)号：US20250098064A1

公开(公告)日：2025-03-20

申请号：US18552754

申请日：2022-10-31

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Nianqi YAO ,  Kun ZHAO ,  Ce NING ,  Zhengliang LI ,  Zhanfeng CAO ,  Ke WANG ,  Jiaxiang ZHANG ,  Qi QI ,  Hehe HU ,  Feifei LI ,  Jie HUANG ,  Jiayu HE

IPC: H05K1/02 ,  G02F1/1335 ,  G02F1/13357 ,  H05K1/11 ,  H05K3/28

Abstract: A circuit board includes a substrate, a first conductive layer, a first insulating layer and a second conductive layer. The first conductive layer includes a plurality of first conductive portions. The second conductive layer includes a plurality of second conductive portions. A second conductive portion passes through a first via hole in the first insulating layer to be in electrical contact with a first conductive portion. The first conductive layer and the second conductive layer each include at least one main conductive layer, which is capable of creating a first intermetallic compound with solder. At least one of the first conductive layer and the second conductive layer further includes a stop layer capable of creating a second intermetallic compound with the solder. A rate of a reaction between the stop layer and the solder is lower than a rate of a reaction between the main conductive layer and the solder.

公开(公告)号：US20240234532A1

公开(公告)日：2024-07-11

申请号：US17925222

申请日：2021-12-27

Applicant: BOE Technology Group Co., Ltd.

Inventor： Hehe HU ,  Dongfang WANG ,  Fengjuan LIU ,  Ce NING ,  Zhengliang LI ,  Jiayu HE ,  Yan QU ,  Kun ZHAO ,  Jie HUANG ,  Liping LEI ,  Yunsik IM ,  Shunhang ZHANG ,  Nianqi YAO ,  Feifei LI

IPC: H01L29/43 ,  H01L27/12 ,  H01L29/417 ,  H01L29/66

CPC classification number: H01L29/435 ,  H01L27/1214 ,  H01L29/41733 ,  H01L29/66742

Abstract: The present disclosure provides a TFT, a manufacturing method and a display substrate, and it relates to the field of TFT technology. The TFT includes: a base substrate; a gate electrode arranged on the base substrate; an active layer arranged at a side of the gate electrode away from the base substrate, an orthogonal projection of the active layer onto the base substrate overlapping with an orthogonal projection of the gate electrode onto the base substrate; and a source electrode and a drain electrode arranged at a side of the active layer away from the base substrate and coupled to the active layer. A resistance between the gate electrode and the drain electrode is greater than a resistance between the gate electrode and the source electrode. According to the present disclosure, it is able to increase a withstand voltage range of the TFT.

公开(公告)号：US20240097042A1

公开(公告)日：2024-03-21

申请号：US17781773

申请日：2021-06-25

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Lizhong WANG ,  Guangcai YUAN ,  Ce NING ,  Nianqi YAO ,  Hehe HU ,  Liping LEI ,  Dongfang WANG ,  Dapeng XUE ,  Shuilang DONG ,  Zhengliang LI

IPC: H01L29/786 ,  H01L29/417 ,  H01L29/423 ,  H01L29/66

CPC classification number: H01L29/7869 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/66742

Abstract: At least one embodiment of the present disclosure provides an oxide thin film transistor, a display device, and a preparation method of the oxide thin film transistor, and the oxide thin film transistor includes a base substrate; an oxide semiconductor layer provided on the base substrate, and an insulating layer provided on a side of the oxide semiconductor layer away from the base substrate; in which the insulating layer is made of oxide; the insulating layer includes a first insulating layer and a second insulating layer which are stacked; a density of the second insulating layer is greater than a density of the first insulating layer; and the second insulating layer is farther away from the base substrate than the first insulating layer.

公开(公告)号：US20230036385A1

公开(公告)日：2023-02-02

申请号：US17772689

申请日：2021-06-24

Applicant: BOE Technology Group Co., Ltd.

Inventor： Jiayu HE ,  Ce NING ,  Zhengliang LI ,  Hehe HU ,  Jie HUANG ,  Nianqi YAO ,  Kun ZHAO ,  Xue LIU ,  Zhi WANG ,  Feng GUAN

IPC: H01L29/786 ,  H01L29/06 ,  H01L29/66

Abstract: The disclosure provides a thin-film transistor, a manufacturing method thereof, an array substrate and a display panel, and belongs to the technical field of thin-film transistor devices. The thin-film transistor includes a base substrate, an active layer on the base substrate including a plurality of semiconductor nanowires, and a plurality of guiding projections on the base substrate which extend along a first direction and are arranged at intervals and each of which includes two side walls extending along the first direction, and the semiconductor nanowire extends along a side wall of the guiding projection. In the thin-film transistor, since the semiconductor nanowires are used as the active layer, mobility and concentration of carriers in the thin-film transistor can be effectively increased and therefore performance of the thin-film transistor can be improved. A length of the semiconductor nanowire is not limited, and a size of the thin-film transistor is not limited.

公开(公告)号：US20220126294A1

公开(公告)日：2022-04-28

申请号：US17432580

申请日：2021-01-22

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Xiaochen MA ,  Ce NING ,  Guangcai YUAN ,  Xin GU ,  Zhengliang LI

IPC: B01L3/00 ,  C23C14/34 ,  C23C14/04

Abstract: A biochip and a method for manufacturing the same are provided. The biochip includes: a guide layer; a channel layer on the guide layer, wherein the channel layer has therein a plurality of first channels extending in a first direction; a plurality of second channels extending in a second direction, wherein each of the plurality of second channels is in communication with the plurality of first channels, the plurality of second channels are in a layer where the channel layer is located, or in a layer where the channel layer and the guide layer are located; an encapsulation cover plate on a side of the channel layer distal to the guide layer; and a driving unit configured to drive biomolecules to move.

公开(公告)号：US20210229088A1

公开(公告)日：2021-07-29

申请号：US16643464

申请日：2019-03-11

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Xiaochen MA ,  Guangcai YUAN ,  Ce NING ,  Zhengliang LI

IPC: B01L3/00 ,  G01N35/10

Abstract: A microfluidic channel and a preparation method and an operation method thereof. The microfluidic channel includes: a channel structure, including a channel for a liquid sample to flow through and a channel wall surrounding the channel. The channel wall includes an electrolyte layer made of an electrolyte material; and a control electrode layer, at a side of the electrolyte layer away from the channel. The control electrode layer overlaps with the electrolyte layer with respect to the channel.

公开(公告)号：US20190043673A1

公开(公告)日：2019-02-07

申请号：US16051550

申请日：2018-08-01

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Xuefei SUN ,  Zhengliang LI ,  Bin ZHANG

IPC: H01G9/20 ,  H01G9/00

Abstract: A use of metallic nano-particles, a dye-sensitized solar cell and a method for fabricating the same are disclosed. The dye-sensitized solar cell includes: an electrode; a semiconductor layer arranged on the electrode and comprising dye molecules; a metallic nano-particle layer arranged on a side of the semiconductor layer away from the electrode; and a counter electrode arranged on a side of the metallic nano-particle layer away from the semiconductor layer.

公开(公告)号：US20160351585A1

公开(公告)日：2016-12-01

申请号：US14895352

申请日：2015-05-15

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Zhanfeng CAO ,  Feng ZHANG ,  Qi YAO ,  Jincheng GAO ,  Bin ZHANG ,  Xiaolong HE ,  Zhengliang LI ,  Wei ZHANG

IPC: H01L27/12 ,  G02F1/1345

CPC classification number: H01L27/124 ,  G02F1/1345 ,  G02F1/13452 ,  G02F1/13454 ,  G02F1/136204 ,  H01L27/12

Abstract: An array substrate and a display device are provided. The array substrate comprises a plurality of signal lines (40), a plurality of connecting lines (50) and a driving module (60) in a peripheral region (1) outside a display region (2); the connecting lines (50) are configured for connecting the signal lines (40) and the driving module (60), to transmit signal from the signal lines (40) to the driving module (60), wherein, at least one of the connecting lines (50) and at least one of the signal lines (40) are designed to intersect with and insulated from each other in a first region (N). The at least one of the signal lines (40) includes, in a second region (O) other than the first region (N), a first electrode line layer (401) and a second electrode line layer (402), while, in the first region (N), includes the first electrode line layer (401) but does not include the second electrode line layer (402). The array substrate may prevent problems of electrostatic accumulation or short circuit from occurring between the connecting lines (50) and the second electrode line layer (402).

Abstract translation: 提供阵列基板和显示装置。 阵列基板包括在显示区域（2）外部的周边区域（1）中的多条信号线（40），多条连接线（50）和驱动模块（60）。 连接线（50）被配置用于连接信号线（40）和驱动模块（60），以将信号从信号线（40）发送到驱动模块（60），其中至少一个连接 线路（50）和信号线（40）中的至少一个被设计成在第一区域（N）中与彼此相交和绝缘。 信号线（40）中的至少一个在除了第一区域（N）之外的第二区域（O）中包括第一电极线层（401）和第二电极线层（402），而在 第一区域（N）包括第一电极线层（401），但不包括第二电极线层（402）。 阵列基板可以防止在连接线（50）和第二电极线层（402）之间发生静电积聚或短路的问题。

公开(公告)号：US20160336373A1

公开(公告)日：2016-11-17

申请号：US15088177

申请日：2016-04-01

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Jincheng GAO ,  Zhanfeng CAO ,  Xiangchun KONG ,  Qi YAO ,  Zhengliang LI ,  Bin Zhang ,  Xiaolong HE

IPC: H01L27/146 ,  G01T1/24 ,  G01T1/20

CPC classification number: H01L27/14663 ,  G01T1/2018 ,  G01T1/241 ,  H01L27/14612

Abstract: The present disclosure provides an X-ray flat panel detector including: a base substrate; thin film transistors (TFTs), a pixel electrode layer, photodiodes, a transparent electrode layer, and an X-ray conversion layer which are arranged on the base substrate; and an electric field application portion configured to generate an electric field, wherein the photodiodes are arranged in the electric field, and a moving direction of negative charges when visible light rays are converted to electrical signals by the photodiodes is substantially same as a direction of the electric field. In this detector, it is applied a direction of the electric field which is substantially same as the moving direction of negative charges in the photodiode, so that movement of holes and electrons of the photodiode may be accelerated under an influence of the electric field, and thus the electrical signal may promptly arrive at the pixel electrode. As a result, it is improved the quantum detection efficiency and the sensitivity of the X-ray flat panel detector.

Abstract translation: 本公开提供了一种X射线平板检测器，包括：基底; 设置在基底基板上的薄膜晶体管（TFT），像素电极层，光电二极管，透明电极层和X射线转换层; 以及电场施加部，被配置为产生电场，其中所述光电二极管被布置在电场中，并且当可见光被所述光电二极管转换为电信号时，所述负电荷的移动方向基本上与所述电场的方向相同 电场。 在该检测器中，施加与光电二极管中的负电荷的移动方向基本相同的电场的方向，从而可以在电场的影响下加速光电二极管的空穴和电子的移动，并且 因此电信号可以迅速到达像素电极。 结果，提高了X射线平板检测器的量子检测效率和灵敏度。