发明申请
- 专利标题: CMOS NANOWIRE STRUCTURE
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申请号: US15411095申请日: 2017-01-20
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公开(公告)号: US20170133277A1公开(公告)日: 2017-05-11
- 发明人: Seiyon KIM , Kelin J. KUHN , Tahir GHANI , Anand S. MURTHY , Annalisa CAPPELLANI , Stephen M. CEA , Rafael RIOS , Glenn A. GLASS
- 申请人: Seiyon KIM , Kelin J. KUHN , Tahir GHANI , Anand S. MURTHY , Annalisa CAPPELLANI , Stephen M. CEA , Rafael RIOS , Glenn A. GLASS
- 主分类号: H01L21/8238
- IPC分类号: H01L21/8238 ; H01L29/423 ; H01L27/12 ; H01L29/06 ; H01L27/092 ; H01L21/84
摘要:
Complimentary metal-oxide-semiconductor nanowire structures are described. For example, a semiconductor structure includes a first semiconductor device. The first semiconductor device includes a first nanowire disposed above a substrate. The first nanowire has a mid-point a first distance above the substrate and includes a discrete channel region and source and drain regions on either side of the discrete channel region. A first gate electrode stack completely surrounds the discrete channel region of the first nanowire. The semiconductor structure also includes a second semiconductor device. The second semiconductor device includes a second nanowire disposed above the substrate. The second nanowire has a mid-point a second distance above the substrate and includes a discrete channel region and source and drain regions on either side of the discrete channel region. The first distance is different from the second distance. A second gate electrode stack completely surrounds the discrete channel region of the second nanowire.
公开/授权文献
- US10074573B2 CMOS nanowire structure 公开/授权日:2018-09-11