- 专利标题: METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE
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申请号: US15651476申请日: 2017-07-17
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公开(公告)号: US20170316973A1公开(公告)日: 2017-11-02
- 发明人: Masayuki KITAMURA , Atsuko SAKATA , Makoto WADA , Yuichi YAMAZAKI , Masayuki KATAGIRI , Akihiro KAJITA , Tadashi SAKAI , Naoshi SAKUMA , Ichiro MIZUSHIMA
- 申请人: KABUSHIKI KAISHA TOSHIBA
- 优先权: JP2012-036377 20120222
- 主分类号: H01L21/768
- IPC分类号: H01L21/768 ; H01L23/532
摘要:
According to one embodiment, a method for manufacturing a semiconductor device is disclosed. The method includes forming a co-catalyst layer and catalyst layer above a surface of a semiconductor substrate. The co-catalyst layer and catalyst layer have fcc structure. The fcc structure is formed such that (111) face of the fcc structure is to be oriented parallel to the surface of the semiconductor substrate. The catalyst includes a portion which contacts the co-catalyst layer. The portion has the fcc structure. An exposed surface of the catalyst layer is planarized by oxidation and reduction treatments. A graphene layer is formed on the catalyst layer.
公开/授权文献
- US10325805B2 Method for manufacturing a semiconductor device 公开/授权日:2019-06-18