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公开(公告)号：US20180275084A1
公开(公告)日：2018-09-27
申请号：US15910815
申请日：2018-03-02
IPC分类号： G01N27/12 , C12Q1/00 , G01N33/551 , G01N33/543
CPC分类号： G01N27/125 , C12Q1/001 , G01N27/128 , G01N27/4146 , G01N33/54373 , G01N33/5438 , G01N33/551
摘要： According to one embodiment, a sensor includes a graphene film and at least two electrodes. The graphene film has an opening. The opening dominantly has either a zigzag edge or an armchair edge. The two electrodes electrically contact the graphene film, for reading a change in electric characteristics of the graphene film due to coaction with an object to be detected.
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公开(公告)号：US20140070425A1
公开(公告)日：2014-03-13
申请号：US13846513
申请日：2013-03-18
IPC分类号： H01L23/538 , H01L21/768
CPC分类号： H01L21/76879 , B82Y40/00 , H01L21/32051 , H01L21/32055 , H01L21/76805 , H01L21/76838 , H01L21/76876 , H01L21/76877 , H01L23/5226 , H01L23/53276 , H01L23/5384 , H01L23/544 , H01L2223/54426 , H01L2924/0002 , H01L2924/00
摘要： According to one embodiment, a semiconductor device includes a semiconductor substrate including semiconductor elements formed thereon, a graphene wiring structure stuck on the substrate with a connection insulating film disposed therebetween and including graphene wires, and through vias each formed through the graphene wiring structure and connection insulating film to connect part of the semiconductor elements to the graphene wires.
摘要翻译： 根据一个实施例，半导体器件包括：半导体衬底，其包括形成在其上的半导体元件，石墨烯布线结构粘附在衬底上，其间设置有连接绝缘膜，并且包括石墨烯线，以及通过通过所述石墨烯布线结构和连接形成的通孔 绝缘膜以将部分半导体元件连接到石墨烯线。
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公开(公告)号：US20160268210A1
公开(公告)日：2016-09-15
申请号：US14842545
申请日：2015-09-01
发明人： Tatsuro SAITO , Masayuki KITAMURA , Atsuko SAKATA , Makoto WADA , Akihiro KAJITA , Tadashi SAKAI
IPC分类号： H01L23/532 , H01L21/768
CPC分类号： H01L23/53276 , H01L21/76861 , H01L21/76876 , H01L21/76885
摘要： According to one embodiment, a semiconductor device is disclosed. The device includes interconnects each including a catalyst layer and a graphene layer thereon. The catalyst layer includes a first to fifth catalyst regions arranged along a first direction in order of the first to fifth catalyst regions. The first, third and fifth catalyst regions include upper surfaces higher than those of the second and fourth catalyst regions. Adjacent ones of the first to fifth catalyst regions are in contact with each other. A distance between the first and the third catalyst region and a distance between the third and fifth catalyst region are greater than a mean free path of graphene. The graphene layer includes a first graphene layer on the second catalyst region and a second graphene layer on the fourth catalyst region.
摘要翻译： 根据一个实施例，公开了一种半导体器件。 该装置包括各自包括催化剂层和其上的石墨烯层的互连。 催化剂层包括按照第一至第五催化剂区域的顺序沿第一方向布置的第一至第五催化剂区域。 第一，第三和第五催化剂区域包括高于第二和第四催化剂区域的上表面。 相邻的第一至第五催化剂区域彼此接触。 第一和第三催化剂区域之间的距离以及第三和第五催化剂区域之间的距离大于石墨烯的平均自由程。 石墨烯层包括第二催化剂区上的第一石墨烯层和第四催化剂区上的第二石墨烯层。
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公开(公告)号：US20150111393A1
公开(公告)日：2015-04-23
申请号：US14172641
申请日：2014-02-04
IPC分类号： H01L21/308 , H01L21/3105 , G03F7/00 , H01L21/027
CPC分类号： H01L21/3086 , G03F7/0002 , H01L21/0274 , H01L21/3105
摘要： In the manufacturing method of a semiconductor device according to the present embodiment, a resist is supplied on a base material. A template including a first template region having a device pattern and a second template region being adjacent to the device pattern and having supporting column patterns is pressed against the resist on the base material. The resist is cured, thereby transferring the device pattern to the resist on a first material region of the base material corresponding to the first template region and at the same time transferring the supporting column patterns to the resist on a second material region of the base material corresponding to the second template region to form supporting columns. The supporting columns are contacted with the first template region when the device pattern is transferred to a resist supplied to the second material region.
摘要翻译： 在本实施方式的半导体装置的制造方法中，在基材上供给抗蚀剂。 包括具有装置图案的第一模板区域和与装置图案相邻并且具有支撑柱图案的第二模板区域的模板被压靠在基材上的抗蚀剂上。 抗蚀剂被固化，从而在对应于第一模板区域的基材的第一材料区域上将装置图案转印到抗蚀剂上，同时在基材的第二材料区域上将支撑柱图案转印到抗蚀剂上 对应于第二模板区域以形成支撑柱。 当将装置图案转移到提供给第二材料区域的抗蚀剂时，支撑柱与第一模板区域接触。
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公开(公告)号：US20140084250A1
公开(公告)日：2014-03-27
申请号：US13846850
申请日：2013-03-18
IPC分类号： H01L29/66
CPC分类号： H01L29/66977 , B82Y30/00 , C01B32/186 , H01L23/528 , H01L23/5283 , H01L23/53276 , H01L2924/0002 , Y10S977/734 , Y10S977/932 , H01L2924/00
摘要： According to one embodiment, a semiconductor device includes a catalyst underlying layer formed on a substrate including semiconductor elements formed thereon and processed in a wiring pattern, a catalyst metal layer that is formed on the catalyst underlying layer and whose width is narrower than that of the catalyst underlying layer, and a graphene layer growing with a sidewall of the catalyst metal layer set as a growth origin and formed to surround the catalyst metal layer.
摘要翻译： 根据一个实施例，半导体器件包括形成在其上形成有并以布线图案形成的半导体元件的基板上的催化剂底层，形成在催化剂下层上的宽度比其宽度窄的催化剂金属层 催化剂底层，以及生长在催化剂金属层的侧壁上的石墨烯层，其被设置为生长来源并形成以包围催化剂金属层。
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公开(公告)号：US20170316973A1
公开(公告)日：2017-11-02
申请号：US15651476
申请日：2017-07-17
发明人： Masayuki KITAMURA , Atsuko SAKATA , Makoto WADA , Yuichi YAMAZAKI , Masayuki KATAGIRI , Akihiro KAJITA , Tadashi SAKAI , Naoshi SAKUMA , Ichiro MIZUSHIMA
IPC分类号： H01L21/768 , H01L23/532
CPC分类号： H01L21/76846 , H01L21/02373 , H01L21/76855 , H01L21/76858 , H01L21/76861 , H01L21/76876 , H01L23/53276 , H01L2221/1089 , H01L2924/0002 , H01L2924/00
摘要： According to one embodiment, a method for manufacturing a semiconductor device is disclosed. The method includes forming a co-catalyst layer and catalyst layer above a surface of a semiconductor substrate. The co-catalyst layer and catalyst layer have fcc structure. The fcc structure is formed such that (111) face of the fcc structure is to be oriented parallel to the surface of the semiconductor substrate. The catalyst includes a portion which contacts the co-catalyst layer. The portion has the fcc structure. An exposed surface of the catalyst layer is planarized by oxidation and reduction treatments. A graphene layer is formed on the catalyst layer.
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公开(公告)号：US20160071803A1
公开(公告)日：2016-03-10
申请号：US14645268
申请日：2015-03-11
发明人： Tatsuro SAITO , Masayuki KITAMURA , Yuichi YAMAZAKI , Akihiro KAJITA , Atsuko SAKATA , Tadashi SAKAI
IPC分类号： H01L23/532 , H01L21/768 , H01L23/522
CPC分类号： H01L23/53276 , H01L21/76843 , H01L21/76844 , H01L21/76864 , H01L21/76876 , H01L21/76877 , H01L21/76879 , H01L23/5226 , H01L23/53223 , H01L23/53238 , H01L23/53266 , H01L2221/1094 , H01L2924/0002 , H01L2924/00
摘要： According to one embodiment, a semiconductor device is disclosed. The device includes a first interconnect, and an insulating film provided on the first interconnect, and being with a through hole communicating with the first interconnect. A catalyst layer is provided on the first interconnect of a bottom portion of the through hole. The catalyst layer has a form of a continuous film, and includes catalyst material and impurity. A first plug is provided in the through hole and is in contact with the catalyst layer, and includes a carbon nanotube layer. A second interconnect is disposed above the first interconnect and connected to the first interconnect via the first plug.
摘要翻译： 根据一个实施例，公开了一种半导体器件。 该装置包括第一互连和设置在第一互连上的绝缘膜，并具有与第一互连连通的通孔。 催化剂层设置在通孔的底部的第一互连上。 催化剂层具有连续膜的形式，并且包括催化剂材料和杂质。 第一插塞设置在通孔中并与催化剂层接触，并且包括碳纳米管层。 第二互连设置在第一互连上方并经由第一插头连接到第一互连。
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公开(公告)号：US20160056256A1
公开(公告)日：2016-02-25
申请号：US14637041
申请日：2015-03-03
发明人： Taishi ISHIKURA , Akihiro KAJITA , Tadashi SAKAI , Atsunobu ISOBAYASHI , Makoto WADA , Tatsuro SAITO , Masayuki KITAMURA , Atsuko SAKATA
IPC分类号： H01L29/45 , H01L21/283 , H01L23/544
CPC分类号： H01L21/283 , H01L21/0243 , H01L21/02527 , H01L21/02645 , H01L21/28562 , H01L21/76838 , H01L21/76864 , H01L21/76876 , H01L23/53276 , H01L23/544 , H01L29/1606 , H01L2223/54426 , H01L2924/0002 , H01L2924/00
摘要： According to one embodiment, a semiconductor device is disclosed. The device includes a foundation layer including first and second layers being different from each other in material, and the foundation layer including a surface on which a boundary of the first and second layers is presented, a catalyst layer on the surface of the foundation layer, and the catalyst layer including a protruding area. The device further includes a graphene layer being in contact with the protruding area.
摘要翻译： 根据一个实施例，公开了一种半导体器件。 该装置包括：基材层，其包括在材料中彼此不同的第一和第二层，并且所述基础层包括其上呈现第一和第二层的边界的表面，基础层表面上的催化剂层， 并且所述催化剂层包括突出区域。 该装置还包括与突出区域接触的石墨烯层。
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公开(公告)号：US20150206842A1
公开(公告)日：2015-07-23
申请号：US14478996
申请日：2014-09-05
IPC分类号： H01L23/532 , H01L23/528 , H01L23/522 , H01L21/768
CPC分类号： H01L23/53276 , H01L21/76849 , H01L21/76852 , H01L21/76876 , H01L23/5226 , H01L23/528 , H01L2924/0002 , H01L2924/00
摘要： According to one embodiment, there is provided a semiconductor device using graphene, includes a catalyst layer formed on or in a substrate along with an interconnect pattern and a graphene layer formed on the catalyst layer. The graphene layer is arranged parallel to a narrower linewidth than the width of the interconnect pattern.
摘要翻译： 根据一个实施例，提供了一种使用石墨烯的半导体器件，包括形成在衬底上或衬底中的催化剂层以及形成在催化剂层上的互连图案和石墨烯层。 石墨烯层平行于比互连图案的宽度窄的线宽。
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公开(公告)号：US20140284814A1
公开(公告)日：2014-09-25
申请号：US13958093
申请日：2013-08-02
IPC分类号： H01L23/48 , H01L21/768
CPC分类号： H01L21/76877 , B82Y10/00 , B82Y40/00 , H01L23/5226 , H01L23/53276 , H01L2221/1094 , H01L2924/0002 , Y10S977/742 , Y10S977/84 , Y10S977/94 , H01L2924/00
摘要： According to one embodiment, a semiconductor device includes a first wiring, a second wiring disposed in the same layer as the first wiring, a first via connected to a bottom surface of the first wiring and formed of a carbon nanotube, and a second via connected to a bottom surface of the second wiring and formed of a metal.
摘要翻译： 根据一个实施例，半导体器件包括第一布线，布置在与第一布线相同的层中的第二布线，连接到第一布线的底表面并由碳纳米管形成的第一通孔， 到第二布线的底表面并由金属形成。
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