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    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
    1.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
    半导体器件及其制造方法

    公开(公告)号：US20160268210A1

    公开(公告)日：2016-09-15

    申请号：US14842545

    申请日：2015-09-01

    申请人： KABUSHIKI KAISHA TOSHIBA

    发明人： Tatsuro SAITO ,  Masayuki KITAMURA ,  Atsuko SAKATA ,  Makoto WADA ,  Akihiro KAJITA ,  Tadashi SAKAI

    IPC分类号： H01L23/532 ,  H01L21/768

    CPC分类号： H01L23/53276 ,  H01L21/76861 ,  H01L21/76876 ,  H01L21/76885

    摘要： According to one embodiment, a semiconductor device is disclosed. The device includes interconnects each including a catalyst layer and a graphene layer thereon. The catalyst layer includes a first to fifth catalyst regions arranged along a first direction in order of the first to fifth catalyst regions. The first, third and fifth catalyst regions include upper surfaces higher than those of the second and fourth catalyst regions. Adjacent ones of the first to fifth catalyst regions are in contact with each other. A distance between the first and the third catalyst region and a distance between the third and fifth catalyst region are greater than a mean free path of graphene. The graphene layer includes a first graphene layer on the second catalyst region and a second graphene layer on the fourth catalyst region.

    摘要翻译： 根据一个实施例，公开了一种半导体器件。 该装置包括各自包括催化剂层和其上的石墨烯层的互连。 催化剂层包括按照第一至第五催化剂区域的顺序沿第一方向布置的第一至第五催化剂区域。 第一，第三和第五催化剂区域包括高于第二和第四催化剂区域的上表面。 相邻的第一至第五催化剂区域彼此接触。 第一和第三催化剂区域之间的距离以及第三和第五催化剂区域之间的距离大于石墨烯的平均自由程。 石墨烯层包括第二催化剂区上的第一石墨烯层和第四催化剂区上的第二石墨烯层。

    SEMICONDUCTOR DEVICE
    3.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号：US20140084250A1

    公开(公告)日：2014-03-27

    申请号：US13846850

    申请日：2013-03-18

    申请人： KABUSHIKI KAISHA TOSHIBA

    发明人： Makoto WADA ,  Yuichi YAMAZAKI ,  Akihiro KAJITA ,  Atsunobu ISOBAYASHI ,  Tatsuro SAITO

    IPC分类号： H01L29/66

    CPC分类号： H01L29/66977 ,  B82Y30/00 ,  C01B32/186 ,  H01L23/528 ,  H01L23/5283 ,  H01L23/53276 ,  H01L2924/0002 ,  Y10S977/734 ,  Y10S977/932 ,  H01L2924/00

    摘要： According to one embodiment, a semiconductor device includes a catalyst underlying layer formed on a substrate including semiconductor elements formed thereon and processed in a wiring pattern, a catalyst metal layer that is formed on the catalyst underlying layer and whose width is narrower than that of the catalyst underlying layer, and a graphene layer growing with a sidewall of the catalyst metal layer set as a growth origin and formed to surround the catalyst metal layer.

    摘要翻译： 根据一个实施例，半导体器件包括形成在其上形成有并以布线图案形成的半导体元件的基板上的催化剂底层，形成在催化剂下层上的宽度比其宽度窄的催化剂金属层 催化剂底层，以及生长在催化剂金属层的侧壁上的石墨烯层，其被设置为生长来源并形成以包围催化剂金属层。

    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
    5.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
    半导体器件及其制造方法

    公开(公告)号：US20150061131A1

    公开(公告)日：2015-03-05

    申请号：US14202683

    申请日：2014-03-10

    申请人： KABUSHIKI KAISHA TOSHIBA

    发明人： Tatsuro SAITO ,  Makoto WADA ,  Atsunobu ISOBAYASHI ,  Akihiro KAJITA ,  Hisao MIYAZAKI ,  Tadashi SAKAI

    IPC分类号： H01L23/48 ,  H01L21/768

    CPC分类号： H01L21/76877 ,  H01L21/28556 ,  H01L23/5226 ,  H01L23/53276 ,  H01L2221/1094 ,  H01L2924/0002 ,  Y10S977/754 ,  Y10S977/932 ,  H01L2924/00

    摘要： According to one embodiment, a semiconductor device in which CNTs are used for a contact via comprises a substrate includes a contact via groove, a catalyst layer for CNT growth which is formed at the bottom of the groove, and a CNT via formed by filling the CNTs into the groove in which the catalyst layer is formed. Each of the CNTs is formed by stacking a plurality of graphene layers in a state in which they are inclined depthwise with respect to the groove, and formed such that ends of the graphene layers are exposed on a sidewall of the CNT. Further, the CNT is doped with at least one element from the sidewall of the CNT.

    摘要翻译： 根据一个实施例，其中CNT用于接触通孔的半导体器件包括衬底，其包括接触通孔槽，形成在沟槽底部的用于CNT生长的催化剂层和通过填充 CNT进入形成催化剂层的槽中。 每个CNT通过在它们相对于凹槽深度方向倾斜的状态下堆叠多个石墨烯层而形成，并且形成为使得石墨烯层的端部暴露在CNT的侧壁上。 此外，CNT从CNT的侧壁掺杂有至少一种元素。

    SEMICONDUCTOR DEVICE USING CARBON NANOTUBE, AND MANUFACTURING METHOD THEREOF
    6.
    发明申请
    SEMICONDUCTOR DEVICE USING CARBON NANOTUBE, AND MANUFACTURING METHOD THEREOF 有权
    使用碳纳米管的半导体器件及其制造方法

    公开(公告)号：US20140252615A1

    公开(公告)日：2014-09-11

    申请号：US13958155

    申请日：2013-08-02

    申请人： KABUSHIKI KAISHA TOSHIBA

    发明人： Tatsuro SAITO ,  Makoto WADA ,  Atsunobu ISOBAYASHI

    IPC分类号： H01L23/532 ,  H01L21/768

    CPC分类号： H01L23/53276 ,  H01L21/76831 ,  H01L21/76844 ,  H01L21/76846 ,  H01L21/76876 ,  H01L21/76879 ,  H01L23/5226 ,  H01L2221/1094 ,  H01L2924/0002 ,  H01L2924/00

    摘要： According to one embodiment, a semiconductor device includes a wiring, a first insulation film, an underlayer deactivation layer, an underlayer, a catalyst layer and a carbon nanotube. The first insulation film is formed on the wiring and includes a hole which exposes the wiring. The underlayer deactivation layer is formed on the first insulation film at a side surface of the hole, and exposes the wiring at a bottom surface of the hole. The underlayer is formed on an exposed surface of the wiring at the bottom surface of the hole and on the underlayer deactivation layer at the side surface of the hole. The catalyst layer is formed on the underlayer at the bottom surface and the side surface of the hole. The carbon nanotube extends from the catalyst layer at the bottom surface of the hole, and fills the hole.

    摘要翻译： 根据一个实施例，半导体器件包括布线，第一绝缘膜，底层失活层，底层，催化剂层和碳纳米管。 第一绝缘膜形成在布线上，并且包括露出布线的孔。 在该孔的侧面的第一绝缘膜上形成有底层钝化层，使该孔的底面的布线露出。 底层形成在孔底部的布线的露出面上，在孔的侧面的底层钝化层上形成。 催化剂层形成在孔的底面和侧面的底层上。 碳纳米管从孔的底面的催化剂层延伸，填充孔。