- 专利标题： FINE-GRAINED ANALOG MEMORY DEVICE BASED ON CHARGE-TRAPPING IN HIGH-K GATE DIELECTRICS OF TRANSISTORS
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申请号： US15595680申请日： 2017-05-15
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公开(公告)号： US20170329575A1公开(公告)日： 2017-11-16
- 发明人: Xuefeng Gu , Subramanian S. Iyer
- 申请人： THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
- 申请人地址： US CA Oakland
- 专利权人： THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
- 当前专利权人： THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
- 当前专利权人地址： US CA Oakland
- 主分类号： G06F7/02
- IPC分类号： G06F7/02 ; G11C11/21 ; G11C5/02 ; G11C7/22 ; H01L29/792 ; G11C11/34
摘要：
A fine-grained analog memory device includes: 1) a charge-trapping transistor including a gate and a high-k gate dielectric; and 2) a pulse generator connected to the gate and configured to apply a positive or negative pulse to the gate to change an amount of charges trapped in the high-k gate dielectric.
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