Invention Application

3D IC BUMP HEIGHT METROLOGY APC
Abstract:
In some embodiments, the present disclosure relates to a method of bump metrology The method is performed by forming a through-substrate-via within a substrate, forming a plurality of metal interconnect layers within a dielectric structure over the substrate, and forming a bump on the plurality of metal interconnect layers. One or more substrate warpage parameters of the substrate are measured and an initial position of a lens within a substrate metrology module is calculated based upon the one or more substrate warpage parameters. The lens is then moved to the initial position, and a height and a width of the bump are measured using the substrate metrology module after moving the lens to the initial position.
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