Invention Application
- Patent Title: PSTTM DEVICE WITH BOTTOM ELECTRODE INTERFACE MATERIAL
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Application No.: US15755446Application Date: 2015-09-25
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Publication No.: US20180248115A1Publication Date: 2018-08-30
- Inventor: Kaan Oguz , Kevin P. O'Brien , Christopher J. Wiegand , MD Tofizur Rahman , Brian S. Doyle , Mark L. Doczy , Oleg Golonzka , Tahir Ghani , Justin S. Brockman
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- International Application: PCT/US15/52430 WO 20150925
- Main IPC: H01L43/08
- IPC: H01L43/08 ; H01L43/10 ; H01L43/12 ; H01L27/22 ; H01F10/32 ; G11C11/16 ; H01F41/30

Abstract:
MTJ material stacks, pSTTM devices employing such stacks, and computing platforms employing such pSTTM devices. In some embodiments, perpendicular MTJ material stacks include one or more electrode interface material layers disposed between a an electrode metal, such as TiN, and a seed layer of an antiferromagnetic layer or synthetic antiferromagnetic (SAF) stack. The electrode interface material layers may include either or both of a Ta material layer or CoFeB material layer. In some Ta embodiments, a Ru material layer may be deposited on a TiN electrode surface, followed by the Ta material layer. In some CoFeB embodiments, a CoFeB material layer may be deposited directly on a TiN electrode surface, or a Ta material layer may be deposited on the TiN electrode surface, followed by the CoFeB material layer.
Public/Granted literature
- US10340445B2 PSTTM device with bottom electrode interface material Public/Granted day:2019-07-02
Information query
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