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公开(公告)号:US11696514B2
公开(公告)日:2023-07-04
申请号:US17565106
申请日:2021-12-29
申请人: Intel Corporation
发明人: Chia-Ching Lin , Sasikanth Manipatruni , Tanay Gosavi , Dmitri Nikonov , Benjamin Buford , Kaan Oguz , John J. Plombon , Ian A. Young
摘要: An apparatus is provided which comprises: a stack comprising a magnetoelectric (ME such as BiFeO3, (LaBi)FeO3, LuFeO3, PMN-PT, PZT, AlN, SmBiFeO3, Cr2O3, etc.) material and a transition metal dichalcogenide (TMD such as MoS2, MoSe2, WS2, WSe2, PtS2, PtSe2, WTe2, MoTe2, graphene, etc.); a magnet adjacent to a first portion of the TMD of the stack; a first interconnect adjacent to the magnet; a second interconnect adjacent to the ME material of the stack; and a third interconnect adjacent to a second portion of the TMD of the stack.
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公开(公告)号:US11508903B2
公开(公告)日:2022-11-22
申请号:US16022094
申请日:2018-06-28
申请人: Intel Corporation
发明人: Angeline Smith , Ian Young , Kaan Oguz , Sasikanth Manipatruni , Christopher Wiegand , Kevin O'Brien , Tofizur Rahman , Noriyuki Sato , Benjamin Buford , Tanay Gosavi
摘要: An insertion layer for perpendicular spin orbit torque (SOT) memory devices between the SOT electrode and the free magnetic layer, memory devices and computing platforms employing such insertion layers, and methods for forming them are discussed. The insertion layer is predominantly tungsten and improves thermal stability and perpendicular magnetic anisotropy in the free magnetic layer.
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公开(公告)号:US11257613B2
公开(公告)日:2022-02-22
申请号:US15942434
申请日:2018-03-31
申请人: Intel Corporation
发明人: Kaan Oguz , Tanay Gosavi , Sasikanth Manipatruni , Charles Kuo , Mark Doczy , Kevin O'Brien
摘要: A perpendicular spin orbit torque (SOT) memory device includes an electrode having a spin orbit torque material, where the SOT material includes iridium and manganese and a perpendicular magnetic tunnel junction (pMTJ) device on a portion of the electrode. The pMTJ device includes a free magnet structure electrode, a fixed layer and a tunnel barrier between the free layer and the fixed layer and a SAF structure above the fixed layer. The Ir—Mn SOT material and the free magnet have an in-plane magnetic exchange bias.
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公开(公告)号:US11245068B2
公开(公告)日:2022-02-08
申请号:US16009035
申请日:2018-06-14
申请人: Intel Corporation
发明人: Chia-Ching Lin , Sasikanth Manipatruni , Tanay Gosavi , Dmitri Nikonov , Benjamin Buford , Kaan Oguz , John J. Plombon , Ian A. Young
摘要: An apparatus is provided which comprises: a stack comprising a magnetoelectric (ME such as BiFeO3, (LaBi)FeO3, LuFeO3, PMN-PT, PZT, AlN, SmBiFeO3, Cr2O3, etc.) material and a transition metal dichalcogenide (TMD such as MoS2, MoSe2, WS2, WSe2, PtS2, PtSe2, WTe2, MoTe2, graphene, etc.); a magnet adjacent to a first portion of the TMD of the stack; a first interconnect adjacent to the magnet; a second interconnect adjacent to the ME material of the stack; and a third interconnect adjacent to a second portion of the TMD of the stack.
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公开(公告)号:US20210408224A1
公开(公告)日:2021-12-30
申请号:US16914161
申请日:2020-06-26
申请人: Intel Corporation
发明人: Kaan Oguz , I-Cheng Tung , Chia-Ching Lin , Sou-Chi Chang , Matthew Metz , Uygar Avci
摘要: A capacitor device, such as a metal insulator metal (MIM) capacitor includes a seed layer including tantalum, a first electrode on the seed layer, where the first electrode includes at least one of ruthenium or iridium and an insulator layer on the seed layer, where the insulator layer includes oxygen and one or more of Sr, Ba or Ti. In an exemplary embodiment, the insulator layer is a crystallized layer having a substantially smooth surface. A crystallized insulator layer having a substantially smooth surface facilitates low electrical leakage in the MIM capacitor. The capacitor device further includes a second electrode layer on the insulator layer, where the second electrode layer includes a second metal or a second metal alloy.
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公开(公告)号:US20210375873A1
公开(公告)日:2021-12-02
申请号:US16888910
申请日:2020-06-01
申请人: Intel Corporation
发明人: Prashant Majhi , Abhishek A. Sharma , Charles Kuo , Brian S. Doyle , Urusa Shahriar Alaan , Van H. Le , Elijah V. Karpov , Kaan Oguz , Arnab Sen Gupta
IPC分类号: H01L27/108 , H01L25/065
摘要: Embodiments may relate to a microelectronic package that includes a first plurality of memory cells of a first type coupled with a substrate. The microelectronic package may further include a second plurality of memory cells of a second type communicatively coupled with the substrate such that the first plurality of memory cells is between the substrate and the second plurality of memory cells. Other embodiments may be described or claimed.
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公开(公告)号:US10964886B2
公开(公告)日:2021-03-30
申请号:US16329169
申请日:2016-09-27
申请人: Intel Corporation
发明人: Brian Doyle , Kaan Oguz , Satyarth Suri , Kevin O'Brien , Mark Doczy , Charles Kuo
IPC分类号: H01L29/82 , H01L43/10 , H01L27/22 , H01L43/08 , G11C11/16 , H01F10/32 , H01L43/02 , H01L43/12
摘要: The present disclosure relates to the fabrication of spin transfer torque memory devices, wherein a magnetic tunnel junction of the spin transfer torque memory device is formed with Heusler alloys as the fixed and free magnetic layers and a tunnel barrier layer disposed between and abutting the fixed Heusler magnetic layer and the free Heusler magnetic layer, wherein the tunnel barrier layer is lattice matched to the free Heusler magnetic layer. In one embodiment, the tunnel barrier layer may be a strontium titanate layer.
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公开(公告)号:US20200051724A1
公开(公告)日:2020-02-13
申请号:US15735622
申请日:2015-06-26
申请人: Intel Corporation
发明人: Brian S. Doyle , Kaan Oguz , Kevin P. O'Brien , David L. Kencke , Charles C. Kuo , Mark L. Doczy , Satyarth Suri , Robert S. Chau
IPC分类号: H01F10/193 , H01F10/32 , H01L43/02 , H01L43/08 , H01L43/10
摘要: An embodiment includes an apparatus comprising: a substrate; a magnetic tunnel junction (MTJ), on the substrate, comprising a fixed layer, a free layer, and a dielectric layer between the fixed and free layers; and a first synthetic anti-ferromagnetic (SAF) layer, a second SAF layer, and an intermediate layer, which includes a non-magnetic metal, between the first and second SAF layers; wherein the first SAF layer includes a Heusler alloy. Other embodiments are described herein.
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公开(公告)号:US10559744B2
公开(公告)日:2020-02-11
申请号:US16072301
申请日:2016-04-01
申请人: Intel Corporation
发明人: Brian Maertz , Christopher J. Wiegand , Daniel G. Oeullette , Md Tofizur Rahman , Oleg Golonzka , Justin S. Brockman , Tahir Ghani , Brian S. Doyle , Kevin P. O'Brien , Mark L. Doczy , Kaan Oguz
摘要: An apparatus including an array of memory cells arranged in a grid defined by word lines and bit lines in a generally orthogonal orientation relative to one another, a memory cell including a resistive memory component and an access transistor, wherein the access transistor includes a diffusion region disposed at an acute angle relative to an associated word line. A method including etching a substrate to form a plurality of fins each including a body having a length dimension including a plurality of first junction regions and a plurality of second junction regions that are generally parallel to one another and offset by angled channel regions displacing in the length dimension an end of a first junction region from the beginning of a second junction region; removing the spacer material; and introducing a gate electrode on the channel region of each of the plurality of fins.
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公开(公告)号:US10522739B2
公开(公告)日:2019-12-31
申请号:US15735616
申请日:2015-06-26
申请人: Intel Corporation
发明人: Kaan Oguz , Kevin P. O'Brien , Brian S. Doyle , David L. Kencke , Charles C. Kuo , Robert S. Chau
摘要: An embodiment includes an apparatus comprising: a substrate; and a perpendicular magnetic tunnel junction (pMTJ) comprising a fixed layer and first and second free layers; wherein (a) the first free layer includes Cobalt (Co), Iron (Fe), and Boron (B), and (b) the second free layer is epitaxial and includes Manganese (Mn) and Gallium (Ga). Other embodiments are described herein.
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