The disclosed technology generally relates to semiconductor devices and more particularly to a vertical channel device and a method of fabricating the same. According to one aspect, a method for fabricating a vertical channel device includes forming a vertical semiconductor structure including an upper portion, an intermediate portion and a lower portion, by etching a semiconductor layer stack arranged on a substrate. The semiconductor layer stack includes an upper semiconductor layer, an intermediate semiconductor layer and a lower semiconductor layer, wherein the intermediate semiconductor layer is formed of a material different from a material of the lower semiconductor layer and different from a material of the upper semiconductor layer. Forming the vertical semiconductor structure includes: etching the upper semiconductor layer to form the upper portion and the intermediate semiconductor layer to form the intermediate portion, detecting whether the etching has reached the lower semiconductor layer, and in response to detecting that the etching has reached the lower semiconductor layer, changing to a modified etching chemistry being different from an etching chemistry used during the etching of the intermediate semiconductor layer, and etching the lower semiconductor layer using the modified etching chemistry to form the lower portion. The modified etching chemistry is such that the lower portion is formed to present, along at least a part of the lower portion, a lateral dimension gradually increasing along a direction towards the substrate. The method further comprises forming a gate stack extending vertically along the intermediate portion to define a channel region of the vertical channel device.