- 专利标题: SYSTEMS, METHODS, AND APPARATUSES FOR IMPLEMENTING REDUCED HEIGHT SEMICONDUCTOR PACKAGES FOR MOBILE ELECTRONICS
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申请号: US16325970申请日: 2016-09-28
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公开(公告)号: US20190214369A1公开(公告)日: 2019-07-11
- 发明人: Georg SEIDEMANN , Thomas WAGNER , Klaus REINGRUBER , Bernd WAIDHAS , Andreas WOLTER
- 申请人: Intel IP Corporation
- 国际申请: PCT/US2016/054223 WO 20160928
- 主分类号: H01L25/065
- IPC分类号: H01L25/065 ; H01L23/498
摘要:
In accordance with disclosed embodiments, there are provided methods, systems, and apparatuses for implementing reduced height semiconductor packages for mobile electronics. For instance, there is disclosed in accordance with one embodiment a stacked die package having therein a bottom functional silicon die; a recess formed within the bottom functional silicon die by a thinning etch partially reducing a vertical height of the bottom functional silicon die at the recess; and a top component positioned at least partially within the recess formed within the bottom functional silicon die. Other related embodiments are disclosed.
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