HIGH EFFICIENCY REDUNDANT ARRAY OF INDEPENDENT MEMORY
Abstract:
A memory system includes memory modules having a number of sets of memory devices including data memory devices for data and error correction code (ECC). The ECC memory devices carry ECC symbols for the memory modules. A host receives and decodes the ECC symbols and executes error correction operations. The host and the memory modules are coupled by a number of channels.
Public/Granted literature
Information query
Patent Agency Ranking
0/0