Invention Application
- Patent Title: HIGH EFFICIENCY REDUNDANT ARRAY OF INDEPENDENT MEMORY
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Application No.: US16386577Application Date: 2019-04-17
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Publication No.: US20190243709A1Publication Date: 2019-08-08
- Inventor: Patrick J. MEANEY , Christian JACOBI , Barry M. TRAGER
- Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Main IPC: G06F11/10
- IPC: G06F11/10 ; G11C29/52 ; H03M13/09 ; H03M13/15

Abstract:
A memory system includes memory modules having a number of sets of memory devices including data memory devices for data and error correction code (ECC). The ECC memory devices carry ECC symbols for the memory modules. A host receives and decodes the ECC symbols and executes error correction operations. The host and the memory modules are coupled by a number of channels.
Public/Granted literature
- US10824508B2 High efficiency redundant array of independent memory Public/Granted day:2020-11-03
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