- 专利标题： Frequent Data Value Compression for Graphics Processing Units
-
申请号： US16388098申请日： 2019-04-18
-
公开(公告)号： US20190251655A1公开(公告)日： 2019-08-15
- 发明人: Saurabh Sharma , Abhishek Venkatesh , Travis T. Schluessler , Prasoonkumar Surti , Altug Koker , Aravindh V. Anantaraman , Pattabhiraman P. K. , Abhishek R. Appu , Joydeep Ray , Kamal Sinha , Vasanth Ranganathan , Bhushan M. Borole , Wenyin Fu , Eric J. Hoekstra , Linda L. Hurd
- 申请人： Intel Corporation
- 主分类号： G06T1/20
- IPC分类号： G06T1/20 ; G06T1/60 ; G06T15/00
摘要：
A control surface tracks an individual cacheline in the original surface for frequent data values. If so, control surface bits are set. When reading a cacheline from memory, first the control surface bits are read. If they happen to be set, then the original memory read is skipped altogether and instead the bits from the control surface provide the value for the entire cacheline.
信息查询
