- 专利标题： BACK END OF LINE INTEGRATION FOR INTERCONNECTS
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申请号： US16151390申请日： 2018-10-04
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公开(公告)号： US20200111699A1公开(公告)日： 2020-04-09
- 发明人: Cornelius B. Peethala , Raghuveer R. Patlolla , Chih-Chao Yang , Roger A. Quon
- 申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
- 主分类号： H01L21/768
- IPC分类号： H01L21/768 ; H01L21/3213 ; H01L21/311 ; H01L23/528 ; H01L23/532
摘要：
A method for back end of line (BEOL) integration for one or more interconnects includes forming one or more interconnects by depositing conductive material on a diffusion barrier layer in respective ones of one or more trenches formed within an interlevel dielectric, forming one or more cap layers on respective ones of the one or more interconnects, and selectively etching the diffusion barrier relative to the one or more cap layers to remove portions of the diffusion barrier layer along the interlevel dielectric.
公开/授权文献
- US10699945B2 Back end of line integration for interconnects 公开/授权日：2020-06-30
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