Invention Application
- Patent Title: REDUCING GATE INDUCED DRAIN LEAKAGE IN DRAM WORDLINE
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Application No.: US16204300Application Date: 2018-11-29
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Publication No.: US20200176451A1Publication Date: 2020-06-04
- Inventor: Sung-Kwan Kang , Gill Yong Lee , Sang Ho Yu , Shih Chung Chen , Jeffrey W. Anthis
- Applicant: Applied Materials, Inc.
- Main IPC: H01L27/108
- IPC: H01L27/108 ; H01L29/49 ; H01L21/3213 ; H01L29/423 ; H01L21/28
Abstract:
Memory devices and methods of forming memory devices are described. The memory devices comprise two work-function metal layers, where one work-function layer has a lower work-function than the other work-function layer. The low work-function layer may reduce gate-induced drain leakage current losses. Methods of forming memory devices are also described.
Public/Granted literature
- US10790287B2 Reducing gate induced drain leakage in DRAM wordline Public/Granted day:2020-09-29
Information query
IPC分类:
