Invention Application
- Patent Title: MEMORY SCALING SEMICONDUCTOR DEVICE
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Application No.: US16816495Application Date: 2020-03-12
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Publication No.: US20210104495A1Publication Date: 2021-04-08
- Inventor: Nagesh Vodrahalli , Shrikar Bhagath , Chih Yang Li , Srinivasan Sivaram , Rama Shukla
- Applicant: SANDISK TECHNOLOGIES LLC
- Applicant Address: US TX Addison
- Assignee: SANDISK TECHNOLOGIES LLC
- Current Assignee: SANDISK TECHNOLOGIES LLC
- Current Assignee Address: US TX Addison
- Main IPC: H01L25/065
- IPC: H01L25/065 ; H01L23/00 ; H01L25/00

Abstract:
A semiconductor device is disclosed including a memory module formed from a pair of semiconductor dies mounted face to face to each other at the wafer level. These die pairs are formed using wafer-to-wafer bonding technology, where the wafers may be bonded to each other when they are of full thickness. The semiconductor device may further include a CMOS logic circuit as part of the pair of semiconductor dies or in its own semiconductor die mounted to the pair of semiconductor dies.
Public/Granted literature
- US11011500B2 Memory scaling semiconductor device Public/Granted day:2021-05-18
Information query
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