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公开(公告)号:US11094674B2
公开(公告)日:2021-08-17
申请号:US16816466
申请日:2020-03-12
Applicant: SANDISK TECHNOLOGIES LLC
Inventor: Nagesh Vodrahalli , Shrikar Bhagath , Rama Shukla
IPC: H01L25/065 , H01L23/00 , H01L25/00
Abstract: A semiconductor device is disclosed including a memory module formed from a pair of semiconductor dies mounted face to face to each other at the wafer level, mechanically resulting in the die pair having a minimum warpage. An electronic component may be bonded to an exposed surface of one of the semiconductor dies.
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公开(公告)号:US11011500B2
公开(公告)日:2021-05-18
申请号:US16816495
申请日:2020-03-12
Applicant: SANDISK TECHNOLOGIES LLC
Inventor: Nagesh Vodrahalli , Shrikar Bhagath , Chih Yang Li , Srinivasan Sivaram , Rama Shukla
IPC: H01L25/065 , H01L23/00 , H01L25/00
Abstract: A semiconductor device is disclosed including a memory module formed from a pair of semiconductor dies mounted face to face to each other at the wafer level. These die pairs are formed using wafer-to-wafer bonding technology, where the wafers may be bonded to each other when they are of full thickness. The semiconductor device may further include a CMOS logic circuit as part of the pair of semiconductor dies or in its own semiconductor die mounted to the pair of semiconductor dies.
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公开(公告)号:US10290354B1
公开(公告)日:2019-05-14
申请号:US15799666
申请日:2017-10-31
Applicant: SANDISK TECHNOLOGIES LLC
Inventor: Daniel Linnen , Srikar Peesari , Kirubakaran Periyannan , Avinash Rajagiri , Shantanu Gupta , Jagdish Sabde , Ashish Ghai , Deepak Bharadwaj , Sukhminder Singh Lobana , Shrikar Bhagath
IPC: G11C5/06 , G11C16/10 , H01L27/11573 , H01L27/11529 , G11C16/04
Abstract: A partial memory die is missing one or more components. One example of a partial memory die includes an incomplete memory structure such that the partial memory die is configured to successfully perform programming, erasing and reading of the incomplete memory structure.
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公开(公告)号:US20210104495A1
公开(公告)日:2021-04-08
申请号:US16816495
申请日:2020-03-12
Applicant: SANDISK TECHNOLOGIES LLC
Inventor: Nagesh Vodrahalli , Shrikar Bhagath , Chih Yang Li , Srinivasan Sivaram , Rama Shukla
IPC: H01L25/065 , H01L23/00 , H01L25/00
Abstract: A semiconductor device is disclosed including a memory module formed from a pair of semiconductor dies mounted face to face to each other at the wafer level. These die pairs are formed using wafer-to-wafer bonding technology, where the wafers may be bonded to each other when they are of full thickness. The semiconductor device may further include a CMOS logic circuit as part of the pair of semiconductor dies or in its own semiconductor die mounted to the pair of semiconductor dies.
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公开(公告)号:US20210104494A1
公开(公告)日:2021-04-08
申请号:US16816466
申请日:2020-03-12
Applicant: SANDISK TECHNOLOGIES LLC
Inventor: Nagesh Vodrahalli , Shrikar Bhagath , Rama Shukla
IPC: H01L25/065 , H01L23/00 , H01L25/00
Abstract: A semiconductor device is disclosed including a memory module formed from a pair of semiconductor dies mounted face to face to each other at the wafer level, mechanically resulting in the die pair having a minimum warpage. An electronic component may be bonded to an exposed surface of one of the semiconductor dies.
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公开(公告)号:US20190130978A1
公开(公告)日:2019-05-02
申请号:US15799666
申请日:2017-10-31
Applicant: SANDISK TECHNOLOGIES LLC
Inventor: Daniel Linnen , Srikar Peesari , Kirubakaran Periyannan , Avinash Rajagiri , Shantanu Gupta , Jagdish Sabde , Ashish Ghai , Deepak Bharadwaj , Sukhminder Singh Lobana , Shrikar Bhagath
IPC: G11C16/10 , G11C16/04 , H01L27/11529 , H01L27/11573
Abstract: A partial memory die is missing one or more components. One example of a partial memory die includes an incomplete memory structure such that the partial memory die is configured to successfully perform programming, erasing and reading of the incomplete memory structure.
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