- 专利标题： SHARED ERROR CHECK AND CORRECT LOGIC FOR MULTIPLE DATA BANKS
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申请号： US17187124申请日： 2021-02-26
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公开(公告)号： US20210183462A1公开(公告)日： 2021-06-17
- 发明人: Susumu Takahashi , Hiroki Fujisawa
- 申请人： Micron Technology, Inc.
- 申请人地址： US ID Boise
- 专利权人： Micron Technology, Inc.
- 当前专利权人： Micron Technology, Inc.
- 当前专利权人地址： US ID Boise
- 主分类号： G11C29/42
- IPC分类号： G11C29/42 ; G11B20/18 ; G11C8/10 ; G11C7/10 ; G11C8/12
摘要：
Systems and methods related to memory devices that may perform error check and correct (ECC) functionality. The systems and methods may employ ECC logic that may be shared between two or more banks. The ECC logic may be used to perform memory operations such as read, write, and masked-write operations, and may increase reliability of storage data.
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