Invention Application
- Patent Title: LOW RESISTANCE INTERCONNECT STRUCTURE FOR SEMICONDUCTOR DEVICE
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Application No.: US16940034Application Date: 2020-07-27
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Publication No.: US20210193565A1Publication Date: 2021-06-24
- Inventor: Jason Huang , Liang-Chor Chung , Cheng-Yuan Li
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Main IPC: H01L23/528
- IPC: H01L23/528 ; H01L21/768 ; H01L21/285 ; H01L21/02

Abstract:
The present disclosure describes an interconnect structure and a method forming the same. The interconnect structure can include a substrate, a layer of conductive material over the substrate, a metallic capping layer over the layer of conductive material, a layer of insulating material over top and side surfaces of the metallic capping layer, and a layer of trench conductor formed in the layer of insulating material and the metallic capping layer.
Public/Granted literature
- US11476191B2 Low resistance interconnect structure for semiconductor device Public/Granted day:2022-10-18
Information query
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