公开(公告)号：US11456263B2

公开(公告)日：2022-09-27

申请号：US16907838

申请日：2020-06-22

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chia-Yu Wei ,  Cheng-Yuan Li ,  Yen-Liang Lin ,  Kuo-Cheng Lee ,  Hsun-Ying Huang ,  Hsin-Chi Chen

IPC: H01L23/00 ,  H01L27/146

Abstract: A semiconductor structure is provided. The semiconductor structure includes a first semiconductor device. The first semiconductor device includes a first bonding layer formed below a first substrate, a first bonding via formed through the first oxide layer and the first bonding layer, a first dummy pad formed in the first bonding layer. The semiconductor structure includes a second semiconductor device. The second semiconductor device includes a second bonding layer formed over a second substrate, a second bonding via formed through the second bonding layer, and a second dummy pad formed in the second bonding layer. The semiconductor structure includes a bonding structure between the first substrate and the second substrate, wherein the bonding structure includes the first bonding via bonded to the second bonding via and the first dummy pad bonded to the second dummy pad.

公开(公告)号：US11791299B2

公开(公告)日：2023-10-17

申请号：US15965116

申请日：2018-04-27

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Cheng-Yuan Li ,  Kuo-Cheng Lee ,  Yun-Wei Cheng ,  Yen-Liang Lin

IPC: H01L23/00

CPC classification number: H01L24/20 ,  H01L24/24 ,  H01L24/82 ,  H01L2224/2105 ,  H01L2224/24145 ,  H01L2224/8212 ,  H01L2224/82896

Abstract: Exemplary embodiments for redistribution layers of integrated circuits are disclosed. The redistribution layers of integrated circuits of the present disclosure include one or more arrays of conductive contacts that are configured and arranged to allow a bonding wave to displace air between the redistribution layers during bonding. This configuration and arrangement of the one or more arrays minimize discontinuities, such as pockets of air to provide an example, between the redistribution layers during the bonding.

公开(公告)号：US12199036B2

公开(公告)日：2025-01-14

申请号：US17871532

申请日：2022-07-22

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Jason Huang ,  Liang-Chor Chung ,  Cheng-Yuan Li

IPC: H01L23/528 ,  H01L21/02 ,  H01L21/285 ,  H01L21/768

Abstract: The present disclosure describes an interconnect structure and a method forming the same. The interconnect structure can include a substrate, a layer of conductive material over the substrate, a metallic capping layer over the layer of conductive material, a layer of insulating material over top and side surfaces of the metallic capping layer, and a layer of trench conductor formed in the layer of insulating material and the metallic capping layer.

公开(公告)号：US11817472B2

公开(公告)日：2023-11-14

申请号：US17504308

申请日：2021-10-18

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chia-Yu Wei ,  Cheng-Yuan Li ,  Hsin-Chi Chen ,  Kuo-Cheng Lee ,  Hsun-Ying Huang ,  Yen-Liang Lin

IPC: H01L27/146

CPC classification number: H01L27/14636 ,  H01L27/1464 ,  H01L27/1469 ,  H01L27/14634 ,  H01L27/14683 ,  H01L27/1463 ,  H01L27/14643

Abstract: The present disclosure is directed to anchor structures and methods for forming anchor structures such that planarization and wafer bonding can be uniform. Anchor structures can include anchor layers formed on a dielectric layer surface and anchor pads formed in the anchor layer and on the dielectric layer surface. The anchor layer material can be selected such that the planarization selectivity of the anchor layer, anchor pads, and the interconnection material can be substantially the same as one another. Anchor pads can provide uniform density of structures that have the same or similar material.

公开(公告)号：US20210193565A1

公开(公告)日：2021-06-24

申请号：US16940034

申请日：2020-07-27

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Jason Huang ,  Liang-Chor Chung ,  Cheng-Yuan Li

IPC: H01L23/528 ,  H01L21/768 ,  H01L21/285 ,  H01L21/02

Abstract: The present disclosure describes an interconnect structure and a method forming the same. The interconnect structure can include a substrate, a layer of conductive material over the substrate, a metallic capping layer over the layer of conductive material, a layer of insulating material over top and side surfaces of the metallic capping layer, and a layer of trench conductor formed in the layer of insulating material and the metallic capping layer.

公开(公告)号：US12021054B2

公开(公告)日：2024-06-25

申请号：US18362730

申请日：2023-07-31

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Cheng-Yuan Li ,  Kuo-Cheng Lee ,  Yun-Wei Cheng ,  Yen-Liang Lin

IPC: H01L23/00

CPC classification number: H01L24/20 ,  H01L24/24 ,  H01L24/82 ,  H01L2224/2105 ,  H01L2224/24145 ,  H01L2224/8212 ,  H01L2224/82896

Abstract: Redistribution layers of integrated circuits include one or more arrays of conductive contacts that are configured and arranged to allow a bonding wave to displace air between the redistribution layers during bonding. This configuration and arrangement of the one or more arrays minimize discontinuities, such as pockets of air to provide an example, between the redistribution layers during the bonding.

公开(公告)号：US20230387172A1

公开(公告)日：2023-11-30

申请号：US18232751

申请日：2023-08-10

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chia-Yu Wei ,  Cheng-Yuan Li ,  Hsin-Chi Chen ,  Kuo-Cheng Lee ,  Hsun-Ying Huang ,  Yen-Liang Lin

IPC: H01L27/146

CPC classification number: H01L27/14636 ,  H01L27/14634 ,  H01L27/1464 ,  H01L27/14643 ,  H01L27/1469 ,  H01L27/1463 ,  H01L27/14683

Abstract: The present disclosure is directed to anchor structures and methods for forming anchor structures such that planarization and wafer bonding can be uniform. Anchor structures can include anchor layers formed on a dielectric layer surface and anchor pads formed in the anchor layer and on the dielectric layer surface. The anchor layer material can be selected such that the planarization selectivity of the anchor layer, anchor pads, and the interconnection material can be substantially the same as one another. Anchor pads can provide uniform density of structures that have the same or similar material.

公开(公告)号：US20220359370A1

公开(公告)日：2022-11-10

申请号：US17869196

申请日：2022-07-20

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Cheng-Yuan Li ,  Kuo-Cheng Lee ,  Yun-Wei Cheng ,  Yen-Liang Lin

IPC: H01L23/528 ,  H01L23/522 ,  H01L23/00 ,  H01L23/544

Abstract: Exemplary embodiments for redistribution layers of integrated circuit components are disclosed. The redistribution layers of integrated circuit components of the present disclosure include one or more arrays of conductive contacts that are configured and arranged to allow a bonding wave to displace air between the redistribution layers during bonding. This configuration and arrangement of the one or more arrays minimize discontinuities, such as pockets of air to provide an example, between the redistribution layers during the bonding.

公开(公告)号：US11476191B2

公开(公告)日：2022-10-18

申请号：US16940034

申请日：2020-07-27

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Jason Huang ,  Liang-Chor Chung ,  Cheng-Yuan Li

IPC: H01L23/528 ,  H01L21/768 ,  H01L21/02 ,  H01L21/285

Abstract: The present disclosure describes an interconnect structure and a method forming the same. The interconnect structure can include a substrate, a layer of conductive material over the substrate, a metallic capping layer over the layer of conductive material, a layer of insulating material over top and side surfaces of the metallic capping layer, and a layer of trench conductor formed in the layer of insulating material and the metallic capping layer.

公开(公告)号：US20190164924A1

公开(公告)日：2019-05-30

申请号：US15965116

申请日：2018-04-27

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Cheng-Yuan Li ,  Kuo-Cheng Lee ,  Yun-Wei Cheng ,  Yen-Liang Lin

IPC: H01L23/00

Abstract: Exemplary embodiments for redistribution layers of integrated circuits are disclosed. The redistribution layers of integrated circuits of the present disclosure include one or more arrays of conductive contacts that are configured and arranged to allow a bonding wave to displace air between the redistribution layers during bonding. This configuration and arrangement of the one or more arrays minimize discontinuities, such as pockets of air to provide an example, between the redistribution layers during the bonding.