Invention Application
- Patent Title: BACKSIDE DEPOSITION TUNING OF STRESS TO CONTROL WAFER BOW IN SEMICONDUCTOR PROCESSING
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Application No.: US17198936Application Date: 2021-03-11
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Publication No.: US20210366792A1Publication Date: 2021-11-25
- Inventor: Daniel FULFORD , Anton J. DEVILLIERS
- Applicant: Tokyo Electron Limited
- Applicant Address: JP Tokyo
- Assignee: Tokyo Electron Limited
- Current Assignee: Tokyo Electron Limited
- Current Assignee Address: JP Tokyo
- Main IPC: H01L21/66
- IPC: H01L21/66 ; H01L21/67 ; H01L23/00

Abstract:
A method of microfabrication is provided. A substrate having a working surface and having a backside surface opposite to the working surface is received. The substrate has an initial wafer bow resulting from one or more micro fabrication processing steps executed on the working surface of the substrate. The initial wafer bow of the substrate is measured and the initial wafer bow is used to generate an initial wafer bow value that identifies a degree of first order wafer bowing of the substrate. A correction film recipe based on the initial wafer bow value is identified. The correction film recipe specifies parameters of a correction film to be deposited on the backside surface of the substrate to change wafer bow of the substrate from the initial wafer bow to a modified wafer bow. The correction film on the backside surface of the substrate according to the correction film recipe is deposited. The correction film physically modifies internal stresses on the substrate and causes the substrate to have a modified bow with the predetermined wafer bow value.
Public/Granted literature
- US12276922B2 Backside deposition tuning of stress to control wafer bow in semiconductor processing Public/Granted day:2025-04-15
Information query
IPC分类: