A method of operating a memory device including receiving a multilevel signal having M levels transmitted by an external controller through a clock receiving pin, where M is a natural number greater than 2, and decoding the multilevel signal to restore at least one of Data Bus Inversion (DBI) data, Data Mask (DM) data, Cyclic Redundancy Check (CRC) data, or Error Correction Code (ECC) data may be provided. The multilevel signal is a clock signal transmitted by the external controller, and is a signal swinging based on an intermediate reference signal that is an intermediate value between a minimum level and a maximum level among the M levels.