Invention Application
- Patent Title: VOLTAGE BIN BOUNDARY CALIBRATION AT MEMORY DEVICE POWER UP
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Application No.: US17022908Application Date: 2020-09-16
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Publication No.: US20220084596A1Publication Date: 2022-03-17
- Inventor: Michael Sheperek , Bruce A. Liikanen , Steve Kientz
- Applicant: MICRON TECHNOLOGY, INC.
- Applicant Address: US ID Boise
- Assignee: MICRON TECHNOLOGY, INC.
- Current Assignee: MICRON TECHNOLOGY, INC.
- Current Assignee Address: US ID Boise
- Main IPC: G11C16/10
- IPC: G11C16/10 ; G11C16/26 ; G11C16/30 ; G11C16/32 ; G11C16/34 ; G06F12/02 ; G06F12/0882

Abstract:
A first current bin boundary for a first voltage bin on a first target die of a set of dies at a memory device is identified by accessing a block family metadata table including an entry for each block family of a memory device. The first current bin boundary corresponds to a first block family associated with the first voltage bin. A first bin boundary offset between the first block family and a second block family corresponding to a first new bin boundary for the first voltage bin is determined. The first bin boundary is determined based on a calibration scan performed for the first voltage bin. A first new bin boundary for the first voltage bin is determined on each die of the set of dies based on the first bin boundary offset.
Information query