Invention Application
- Patent Title: SEMICONDUCTOR DEVICE EXAMINATION METHOD AND SEMICONDUCTOR DEVICE EXAMINATION DEVICE
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Application No.: US17606829Application Date: 2020-04-09
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Publication No.: US20220206063A1Publication Date: 2022-06-30
- Inventor: Tomochika TAKESHIMA , Takafumi HIGUCHI , Kazuhiro HOTTA
- Applicant: HAMAMATSU PHOTONICS K.K.
- Applicant Address: JP Hamamatsu-shi, Shizuoka
- Assignee: HAMAMATSU PHOTONICS K.K.
- Current Assignee: HAMAMATSU PHOTONICS K.K.
- Current Assignee Address: JP Hamamatsu-shi, Shizuoka
- Priority: JP2019-102282 20190531
- International Application: PCT/JP2020/015978 WO 20200409
- Main IPC: G01R31/303
- IPC: G01R31/303

Abstract:
A semiconductor device examination method includes a step of acquiring a first interference waveform based on signals from a plurality of drive elements according to light from a first light beam spot including the plurality of drive elements in a semiconductor device, a step of acquiring a second interference waveform based on signals from the plurality of drive elements according to light from a second light beam spot having a region configured to partially overlap the first spot and including the plurality of drive elements, and a step of separating a waveform signal for each of the drive elements in the first and second spots based on the first and second interference waveforms.
Public/Granted literature
- US12044729B2 Semiconductor device examination method and semiconductor device examination device Public/Granted day:2024-07-23
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