Invention Application
- Patent Title: CORRECTION OF BIT ERRORS
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Application No.: US17579721Application Date: 2022-01-20
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Publication No.: US20220231704A1Publication Date: 2022-07-21
- Inventor: Thomas Kern , Michael Goessel , Thomas Rabenalt
- Applicant: Infineon Technologies AG
- Applicant Address: DE Neubiberg
- Assignee: Infineon Technologies AG
- Current Assignee: Infineon Technologies AG
- Current Assignee Address: DE Neubiberg
- Priority: DE102021101157.4 20210120,DE102021133678.3 20211217
- Main IPC: H03M13/15
- IPC: H03M13/15

Abstract:
Processing of a bit sequence is proposed, wherein (i) a first partial error syndrome s1 of an error syndrome and a second partial error syndrome s2 of the error syndrome are determined for the bit sequence, (ii) a first comparison value is determined on the basis of a bit position and the first partial error syndrome, (iii) a second comparison value is determined on the basis of the bit position and the second partial error syndrome, and (iv) the bit position is corrected should a comparison of the first comparison value with the second comparison value assume a specified value and otherwise the bit position is not corrected.
Public/Granted literature
- US11722153B2 Correction of bit errors Public/Granted day:2023-08-08
Information query
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