- 专利标题: EMBEDDED BRIDGE ARCHITECTURE WITH THINNED SURFACE
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申请号: US17213147申请日: 2021-03-25
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公开(公告)号: US20220310518A1公开(公告)日: 2022-09-29
- 发明人: Haobo CHEN , Xiaoying GUO , Hongxia FENG , Kristof DARMAWIKARTA , Bai NIE , Tarek A. IBRAHIM , Gang DUAN , Jeremy D. ECTON , Sheng C. LI , Leonel ARANA
- 申请人: Intel Corporation
- 申请人地址: US CA Santa Clara
- 专利权人: Intel Corporation
- 当前专利权人: Intel Corporation
- 当前专利权人地址: US CA Santa Clara
- 主分类号: H01L23/538
- IPC分类号: H01L23/538 ; H01L23/498 ; H01L23/00 ; H01L21/48
摘要:
Embodiments disclosed herein include a multi-die packages with an embedded bridge and a thinned surface. In an example, a multi-die interconnect structure includes a package substrate having a cavity. A bridge die is in the cavity of the package substrate, the bridge die including silicon. A dielectric material is over the package substrate, over the bridge die, and in the cavity. A plurality of conductive bond pads is on the dielectric material. The multi-die interconnect structure further includes a plurality of conductive pillars, individual ones of the plurality of conductive pillars on a corresponding one of the plurality of conductive bond pads. A solder resist material is on the dielectric material, on exposed portions of the plurality of conductive bond pads, and laterally surrounding the plurality of conductive pillars. The plurality of conductive pillars has a top surface above a top surface of the solder resist material.
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