Invention Application
- Patent Title: SEMICONDUCTOR PACKAGE HAVING PASSIVE SUPPORT WAFER
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Application No.: US17858031Application Date: 2022-07-05
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Publication No.: US20220352121A1Publication Date: 2022-11-03
- Inventor: Debendra MALLIK , Digvijay A. RAORANE , Ravindranath Vithal MAHAJAN , Mitul Bharat MODI
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Main IPC: H01L25/065
- IPC: H01L25/065 ; H01L21/768 ; H01L21/822 ; H01L23/31 ; H01L23/42 ; H01L23/48 ; H01L23/00 ; H01L21/56 ; H01L25/00

Abstract:
Semiconductor packages including passive support wafers, and methods of fabricating such semiconductor packages, are described. In an example, a semiconductor package includes a passive support wafer mounted on several active dies. The active dies may be attached to an active die wafer, and the passive support wafer may include a monolithic form to stabilize the active dies and active die wafer during processing and use. Furthermore, the passive support wafer may include a monolith of non-polymeric material to transfer and uniformly distribute heat generated by the active dies.
Information query
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