Invention Application
- Patent Title: FINFET STRUCTURE AND METHOD WITH REDUCED FIN BUCKLING
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Application No.: US17876330Application Date: 2022-07-28
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Publication No.: US20220384650A1Publication Date: 2022-12-01
- Inventor: Wei-Jen LAI , Yen-Ming CHEN , Tsung-Lin LEE
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L27/092 ; H01L29/10 ; H01L29/49 ; H01L29/06 ; H01L21/02 ; H01L21/8238 ; H01L21/28 ; H01L21/762

Abstract:
The present disclosure provides one embodiment of a method making semiconductor structure. The method includes forming a composite stress layer on a semiconductor substrate, wherein the forming of the composite stress layer includes forming a first stress layer of a dielectric material with a first compressive stress and forming a second stress layer of the dielectric material with a second compressive stress on the first stress layer, the second compressive stress being greater than the first compressive stress; and patterning the semiconductor substrate to form fin active regions using the composite stress layer as an etch mask.
Public/Granted literature
- US11855207B2 FinFET structure and method with reduced fin buckling Public/Granted day:2023-12-26
Information query
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